1 | /* |
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2 | * archinfo.h - Hardware Architecture Information structures |
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3 | * |
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4 | * Author Alain Greiner (2016) |
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5 | * |
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6 | * Copyright (c) UPMC Sorbonne Universites |
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7 | * |
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8 | * This file is part of ALMOS-MKH. |
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9 | * |
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10 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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11 | * under the terms of the GNU General Public License as published by |
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12 | * the Free Software Foundation; version 2.0 of the License. |
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13 | * |
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14 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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17 | * General Public License for more details. |
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18 | * |
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19 | * You should have received a copy of the GNU General Public License |
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20 | * along with ALMOS-MKH; if not, write to the Free Software Foundation, |
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21 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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22 | */ |
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23 | |
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24 | #ifndef _ARCHINFO_H_ |
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25 | #define _ARCHINFO_H_ |
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26 | |
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27 | /**************************************************************************************** |
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28 | * The ARCHINFO data structure describes a generic manycore hardware architecture: |
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29 | * - The number of cluster is variable (can be one). |
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30 | * - The cluster topology is variable (2D mesh or vector) |
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31 | * - The number of cores per cluster is variable (can be zero). |
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32 | * - The number of addressable component per cluster is variable. |
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33 | * - The size of the physical memory bank per cluster is variable. |
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34 | * An adressable device componentcan can be a physical memory bank or a peripheral. |
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35 | * Each cluster cover a fixed size segment in physical address space. |
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36 | * |
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37 | * It is loaded from the block device by the ALMOS-MKH bootloader as a BLOB. |
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38 | * The ARCHINFO structure has a three levels hierarchical organisation: |
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39 | * - the architecture contains a variable number of clusters. |
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40 | * - each cluster contains a variable number of cores and a variable number of devices. |
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41 | * - some device contains a variable number of input IRQs. |
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42 | |
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43 | * The BLOB is organised as the concatenation of a fixed size header, |
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44 | * and 4 variable size arrays of fixed size objects in the following order: |
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45 | * 1 : archinfo_core_t core[] |
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46 | * 2 : archinfo_cluster_t cluster[] |
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47 | * 3 : archinfo_device_t device[] |
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48 | * 4 : archinfo_irq_t irq[] |
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49 | ***************************************************************************************/ |
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50 | |
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51 | #include <hal_types.h> |
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52 | |
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53 | #define ARCHINFO_HEADER_SIZE sizeof(archinfo_header_t) |
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54 | #define ARCHINFO_CLUSTER_SIZE sizeof(archinfo_cluster_t) |
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55 | #define ARCHINFO_CORE_SIZE sizeof(archinfo_core_t) |
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56 | #define ARCHINFO_IRQ_SIZE sizeof(archinfo_irq_t) |
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57 | #define ARCHINFO_DEVICE_SIZE sizeof(archinfo_device_t) |
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58 | |
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59 | #define ARCHINFO_SIGNATURE 0xBABE2016 |
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60 | |
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61 | /**************************************************************************************** |
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62 | * This enum defines the supported device types. |
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63 | * The 16 MSB bits define the functionnal type. |
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64 | * The 16 LSB bits define the implementation type. |
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65 | * It must be consistent with values defined in file arch_class.py |
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66 | ***************************************************************************************/ |
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67 | |
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68 | enum deviceTypes |
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69 | { |
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70 | DEV_TYPE_RAM = 0x00000000, |
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71 | DEV_TYPE_DMA = 0x00010000, |
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72 | DEV_TYPE_FBF = 0x00020000, |
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73 | DEV_TYPE_IOB = 0x00030000, |
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74 | DEV_TYPE_IOC_BDV = 0x00040000, |
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75 | DEV_TYPE_IOC_HBA = 0x00040001, |
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76 | DEV_TYPE_IOC_SDC = 0x00040002, |
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77 | DEV_TYPE_IOC_SPI = 0x00040003, |
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78 | DEV_TYPE_IOC_RDK = 0x00040004, |
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79 | DEV_TYPE_MMC = 0x00050000, |
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80 | DEV_TYPE_MWR_CPY = 0x00060000, |
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81 | DEV_TYPE_MWR_GCD = 0x00060001, |
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82 | DEV_TYPE_MWR_DCT = 0x00060002, |
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83 | DEV_TYPE_NIC = 0x00070000, |
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84 | DEV_TYPE_ROM = 0x00080000, |
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85 | DEV_TYPE_SIM = 0x00090000, |
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86 | DEV_TYPE_TIM = 0x000A0000, |
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87 | DEV_TYPE_TTY = 0x000B0000, |
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88 | DEV_TYPE_XCU = 0x000C0000, |
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89 | DEV_TYPE_PIC = 0x000D0000, |
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90 | DEV_TYPE_CMA = 0x000E0000, |
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91 | }; |
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92 | |
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93 | /**************************************************************************************** |
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94 | * This structure defines the ARCHINFO header. |
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95 | * WARNING: the size of this structure (128 bytes) is used by the ALMOS-MKH bootloader. |
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96 | ***************************************************************************************/ |
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97 | |
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98 | typedef struct __attribute__((packed)) archinfo_header_s |
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99 | { |
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100 | uint32_t signature; // must contain ARCH_INFO_SIGNATURE |
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101 | uint32_t x_size; // number of clusters in a row |
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102 | uint32_t y_size; // number of clusters in a column |
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103 | uint32_t paddr_width; // number of bits for physical address |
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104 | uint32_t x_width; // number of bits for x coordinate |
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105 | uint32_t y_width; // number of bits for y coordinate |
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106 | uint32_t cores_max; // max number of cores per cluster |
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107 | uint32_t devices_max; // max number of devices per cluster |
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108 | |
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109 | uint32_t cores; // total number of cores |
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110 | uint32_t devices; // total number of devices |
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111 | uint32_t irqs; // total number of irqs |
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112 | uint32_t io_cxy; // io_cluster identifier |
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113 | uint32_t boot_cxy; // boot_cluster identifier |
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114 | uint32_t irqs_per_core; // number of IRQs per core |
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115 | uint32_t cache_line_size; // number of bytes |
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116 | uint32_t reserved; // reserved |
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117 | |
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118 | char name[64]; // architecture name |
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119 | } |
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120 | archinfo_header_t; |
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121 | |
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122 | |
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123 | /**************************************************************************************** |
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124 | * This structure defines the ARCHINFO cluster. |
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125 | ***************************************************************************************/ |
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126 | |
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127 | typedef struct __attribute__((packed)) archinfo_cluster_s |
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128 | { |
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129 | uint32_t cxy; // cluster identifier |
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130 | uint32_t cores; // number of cores in cluster |
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131 | uint32_t core_offset; // global index of first core in cluster |
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132 | uint32_t devices; // number of devices in cluster |
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133 | uint32_t device_offset; // global index of first device in cluster |
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134 | } |
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135 | archinfo_cluster_t; |
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136 | |
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137 | /**************************************************************************************** |
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138 | * This structure defines the ARCHINFO core descriptor. |
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139 | * WARNING: the size of this structure (8 bytes) is used by the ALMOS-MKH bootloader. |
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140 | ***************************************************************************************/ |
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141 | |
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142 | typedef struct __attribute__((packed)) archinfo_core_s |
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143 | { |
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144 | uint32_t gid; // core hardware identifier |
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145 | uint16_t lid; // core local index in cluster |
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146 | uint16_t cxy; // cluster identifier |
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147 | } |
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148 | archinfo_core_t; |
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149 | |
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150 | /**************************************************************************************** |
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151 | * This structure defines the ARCHINFO device descriptor. |
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152 | ***************************************************************************************/ |
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153 | |
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154 | typedef struct __attribute__((packed)) archinfo_device_s |
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155 | { |
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156 | uint32_t type; // supported values defined above |
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157 | uint64_t base; // base address in physical space |
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158 | uint64_t size; // size (bytes) |
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159 | uint32_t channels; // number of channels |
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160 | uint32_t arg0; // semantic depends on device type |
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161 | uint32_t arg1; // semantic depends on device type |
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162 | uint32_t arg2; // semantic depends on device type |
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163 | uint32_t arg3; // semantic depends on device type |
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164 | uint32_t irqs; // number of input IRQs (for XCU or PIC) |
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165 | uint32_t irq_offset; // global index of first IRQ |
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166 | } |
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167 | archinfo_device_t; |
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168 | |
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169 | /**************************************************************************************** |
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170 | * This structure defines the ARCHINFO input IRQs for XCU or PIC components. |
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171 | * It describes the hardware connection from one device output IRQ (identified |
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172 | * by the source device type, channel, and direction) to a PIC or XCU iput port. |
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173 | ***************************************************************************************/ |
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174 | |
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175 | typedef struct __attribute__((packed)) archinfo_irq_s |
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176 | { |
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177 | uint32_t dev_type; // source device type index |
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178 | uint8_t channel; // source device channel |
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179 | uint8_t is_rx; // source device direction |
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180 | uint8_t port; // input IRQ index (in XCU/PIC) |
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181 | uint8_t reserved; // padding |
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182 | } |
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183 | archinfo_irq_t; |
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184 | |
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185 | /**************************************************************************** |
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186 | * These functions allows the boot-loader to get to the starting address * |
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187 | * of various ARCHINFO tables. * |
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188 | ****************************************************************************/ |
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189 | |
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190 | inline archinfo_core_t* archinfo_get_core_base(archinfo_header_t* header) |
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191 | { |
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192 | return (archinfo_core_t*)((char*)header + |
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193 | ARCHINFO_HEADER_SIZE); |
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194 | } |
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195 | |
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196 | inline archinfo_cluster_t* archinfo_get_cluster_base(archinfo_header_t* header) |
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197 | { |
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198 | return (archinfo_cluster_t*)((char*)header + |
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199 | ARCHINFO_HEADER_SIZE + |
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200 | ARCHINFO_CORE_SIZE * header->cores); |
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201 | } |
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202 | |
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203 | inline archinfo_device_t* archinfo_get_device_base(archinfo_header_t* header) |
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204 | { |
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205 | return (archinfo_device_t*)((char*)header + |
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206 | ARCHINFO_HEADER_SIZE + |
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207 | ARCHINFO_CORE_SIZE * header->cores + |
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208 | ARCHINFO_CLUSTER_SIZE * header->x_size * |
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209 | header->y_size); |
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210 | } |
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211 | |
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212 | inline archinfo_irq_t* archinfo_get_irq_base(archinfo_header_t* header) |
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213 | { |
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214 | return (archinfo_irq_t*)((char*)header + |
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215 | ARCHINFO_HEADER_SIZE + |
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216 | ARCHINFO_CORE_SIZE * header->cores + |
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217 | ARCHINFO_CLUSTER_SIZE * header->x_size * |
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218 | header->y_size + |
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219 | ARCHINFO_DEVICE_SIZE * header->devices); |
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220 | } |
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221 | |
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222 | #endif /* _ARCHINFO_H_ */ |
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