Index: trunk/kernel/devices/dev_mmc.h
===================================================================
--- trunk/kernel/devices/dev_mmc.h	(revision 690)
+++ trunk/kernel/devices/dev_mmc.h	(revision 1)
@@ -2,5 +2,5 @@
  * dev_mmc.h - MMC (Generic L2 cache controller) device API definition.
  *
- * Authors   Alain Greiner  (2016,2017,2018,2019,2020)
+ * Authors   Alain Greiner  (2016)
  *
  * Copyright (c) UPMC Sorbonne Universites
@@ -25,6 +25,7 @@
 #define _DEV_MMC_H_
 
-#include <kernel_config.h>
-#include <hal_kernel_types.h>
+#include <almos_config.h>
+#include <hal_types.h>
+#include <spinlock.h>
 
 /*****************************************************************************************
@@ -34,15 +35,10 @@
  * acting in all clusters containing a level 2 cache controller.
  *
- * It supports three different services:
- * 1) L2/L3 software cache-coherence operations.
- * 2) error reporting for architecture specific addressing error.
- * 3) architecture specific intrumentation registers access. 
- *
- * It supports therefore five command types: 
+ * It supports  five command types: 
  * - MMC_CC_INVAL   : invalidate all cache lines covering a given buffer in L2 cache.
  * - MMC_CC_SYNC    : synchronize all cache lines covering a given buffer to L3 cache.
- * - MMC_ERROR_GET  : return content of a given error signaling register.
- * - MMC_ERROR_SET  : set a given error signaling register.
- * - MMC_INSTR_GET  : return content of a given instrumentation register.
+ * - MMC_GET_ERROR  : return content of a given error signaling register.
+ * - MMC_SET_ERROR  : set a given error signaling register.
+ * - MMC_GET_INSTRU : return content of a given instrumentation register.
  *
  * As all L2 caches can be accessed by any thread running in any cluster, a calling
@@ -50,12 +46,8 @@
  * As these operations consume few cycles, and access conflicts are expected to be 
  * rare events, the calling threads use a busy waiting strategy to get the device
- * busylock, but do not register in the device waiting queue, and no server thread
+ * spinlock, do not register in the device waiting queue, and no server thread
  * is used for this device.
  ****************************************************************************************/
  
-/****  Forward declarations  ****/
-
-struct chdev_s;
-
 /******************************************************************************************
  * This enum defines the various implementations of the generic MMC peripheral.
@@ -78,17 +70,17 @@
     MMC_CC_INVAL   = 0,
     MMC_CC_SYNC    = 1,
-    MMC_ERROR_GET  = 2,
-    MMC_ERROR_SET  = 3,
-    MMC_INSTR_GET  = 4,
+    MMC_GET_ERROR  = 2,
+    MMC_SET_ERROR  = 3,
+    MMC_GET_INSTRU = 4,
 };
 
 typedef struct mmc_command_s
 {
-    xptr_t      dev_xp;     /*! extended pointer on target MMC device descriptor        */
+    xptr_t      dev_xp;     /*! extended pointer on the relevant MMC device descriptor  */
     uint32_t    type;       /*! CC_INVAL / CC_SYNC / GET_ERROR / SET_ERROR / GET_INSTRU */
-    void      * buf_ptr;    /*! local pointer on memory buffer    (used by INVAL/SYNC)  */
-    uint32_t    buf_size;   /*! memory buffer size (bytes)        (used by INVAL/SYNC)  */
-    uint32_t    reg_index;  /*! register index in MMC peripheral  (used by SET/GET)     */
-    uint32_t  * reg_ptr;    /*! local pointer on src/dst buffer   (used by SET/GET)     */
+    paddr_t     buf_paddr;  /*! buffer physical address          (used by INVAL/SYNC)   */
+    uint32_t    buf_size;   /*! buffer size in bytes             (used by INVAL/SYNC)   */
+    uint32_t    reg_index;  /*! register index in MMC peripheral (used by SET/GET)      */
+    uint32_t  * reg_ptr;    /*! local pointer on src/dst buffer  (used by SET/GET)      */
     error_t     error;      /*! operation status (0 if success)                         */
 }
@@ -96,40 +88,40 @@
 
 /*****************************************************************************************
- * This function initializes the driver specific fields in the local MMC chdev,  
- * and initializes the implementation specific MMC  driver.
+ * This function initializes the driver specific fields in the generic MMC device 
+ * descriptor, and the implementation specific driver.
  * It must be executed once in any cluster containing an L2 cache.
  *****************************************************************************************
- * @ chdev      : pointer on MMC device descriptor.
+ * @ mmc_xp     : extended pointer on MMC device descriptor.
  ****************************************************************************************/
-void dev_mmc_init( struct chdev_s * chdev );
+void dev_mmc_init( xptr_t  mmc_xp );
 
 /*****************************************************************************************
- * This function invalidates all cache lines covering a memory buffer  defined by 
- * the <buf_xp> and <buf_size> arguments.
+ * This function invalidates all cache lines covering a memory buffer 
+ * in the physical address space. 
  * It can be executed by any thread in any cluster, because it uses remote accesses
  * to access both the MMC device descriptor, and the L2 cache configuration interface.
  *****************************************************************************************
- * @ buf_xp     : extended pointer on memory buffer.
+ * @ buf_paddr  : buffer local physical addresse.
  * @ buf_size   : buffer size (bytes).
  * @ return 0 if success / return EINVAL if failure
  ****************************************************************************************/
-error_t dev_mmc_inval( xptr_t     buf_xp,
-                       uint32_t   buf_size );
+error_t dev_mmc_inval( paddr_t   buf_paddr,
+                       uint32_t  buf_size );
 
 /*****************************************************************************************
  * This function forces the L2 cache to synchronize the L3 cache for all cache lines
- * covering a memory buffer defined by the <buf_xp> and <buf_size> arguments.
+ * covering a memory buffer in the physical address space. 
  * It can be executed by any thread in any cluster, because it uses remote accesses
  * to access both the MMC device descriptor, and the L2 cache configuration interface.
  *****************************************************************************************
- * @ buf_xp     : extended pointer on memory buffer.
+ * @ buf_paddr  : buffer local physical addresse.
  * @ buf_size   : buffer size (bytes).
  * @ return 0 if success / return EINVAL if failure
  ****************************************************************************************/
-error_t dev_mmc_sync( xptr_t     buf_xp,
+error_t dev_mmc_sync( paddr_t    buf_paddr,
                       uint32_t   buf_size );
                         
 /*****************************************************************************************
- * This function set a value in one (architecture specific) MMC_ERROR register.
+ * This function set a value in one error signaling MMC register.
  * It can be executed by any thread in any cluster, because it uses remote accesses
  * to access the L2 cache instrumentation interface in any cluster.
@@ -140,12 +132,12 @@
  * @ return 0 if success / return EINVAL if failure
  ****************************************************************************************/
-error_t dev_mmc_error_set( cxy_t    cxy,
+error_t dev_mmc_set_error( cxy_t    cxy,
                            uint32_t index,
                            uint32_t wdata );
               
 /*****************************************************************************************
- * This function returns the value contained in one (architecture specific) MMC_ERROR
- * register. It can be executed by any thread in any cluster, because it uses remote
- * accesses to access the L2 cache instrumentation interface in any cluster.
+ * This function returns the value contained in one error signaling MMC register.
+ * It can be executed by any thread in any cluster, because it uses remote accesses
+ * to access the L2 cache instrumentation interface in any cluster.
  *****************************************************************************************
  * @ cxy     : MMC cluster identifier.
@@ -154,21 +146,22 @@
  * @ return 0 if success / return EINVAL if failure
  ****************************************************************************************/
-error_t dev_mmc_error_get( cxy_t      cxy,
+error_t dev_mmc_get_error( cxy_t      cxy,
                            uint32_t   index, 
                            uint32_t * rdata );
               
+
 /*****************************************************************************************
- * This function returns the value contained in one (architecture specific) MMC_INSTR
- * register. It can be executed by any thread in any cluster, because it uses remote
- * accesses to access the L2 cache instrumentation interface in any cluster.
+ * This function returns the value contained in one instrumentation MMC register.
+ * It can be executed by any thread in any cluster, because it uses remote accesses
+ * to access the L2 cache configuration interface in any cluster.
  *****************************************************************************************
  * @ cxy     : MMC cluster identifier.
- * @ index   : error register index in MMC peripheral.
+ * @ index   : instrumentation register index in MMC peripheral.
  * @ rdata   : local pointer on buffer for returned value.
  * @ return 0 if success / return EINVAL if failure
  ****************************************************************************************/
-error_t dev_mmc_instr_get( cxy_t      cxy,
-                           uint32_t   index, 
-                           uint32_t * rdata );
-              
+error_t dev_mmc_get_instrumentation( cxy_t      cxy,
+                                     uint32_t   index,
+                                     uint32_t * rdata );
+
 #endif  /* _DEV_MMC_H_ */
