Changeset 107 for trunk/hal/tsar_mips32
- Timestamp:
- Jun 30, 2017, 9:28:00 AM (7 years ago)
- File:
-
- 1 edited
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trunk/hal/tsar_mips32/core/hal_ppm.c
r106 r107 1 1 /* 2 * hal_ppm.c - Generic Physical Page TableAPI implementation for TSAR2 * hal_ppm.c - Generic Physical Page Manager API implementation for TSAR 3 3 * 4 4 * Authors Alain Greiner (2016,2017) … … 49 49 50 50 // get relevant info from boot_info structure 51 uint32_t 52 uint32_t 53 uint32_t 51 uint32_t pages_nr = info->pages_nr; 52 uint32_t pages_tbl_offset = info->pages_offset; 53 uint32_t rsvd_nr = info->rsvd_nr; 54 54 55 55 // check no reserved zones other than kernel code for TSAR … … 75 75 list_root_init( &ppm->dirty_root ); 76 76 77 // initialize pages_nr, pages_tbl, and vaddr_base pointers78 // (TSAR uses identity mapping for kernel pointers)79 // x86 architectures should use vaddr_base = 0xFFFF8000000000 + (cxy << 36)80 ppm->pages_nr = pages_nr;81 ppm->vaddr_base = NULL;82 ppm->pages_tbl = (page_t*)( ppm->vaddr_base +83 (pages_tbl_offset << CONFIG_PPM_PAGE_SHIFT) );84 85 77 // compute size of pages_tbl[] array rounded to an integer number of pages 86 78 uint32_t bytes = ARROUND_UP( pages_nr * sizeof(page_t), CONFIG_PPM_PAGE_SIZE ); … … 91 83 // compute total number of reserved pages (kernel code & pages_tbl[]) 92 84 uint32_t reserved_pages = pages_tbl_offset + pages_tbl_nr; 85 86 // initialize pages_nr, pages_tbl, and vaddr_base pointers 87 // (TSAR uses identity mapping for kernel pointers) 88 // x86 architectures should use vaddr_base = 0xFFFF8000000000 + (cxy << 36) 89 ppm->pages_nr = pages_nr; 90 ppm->vaddr_base = NULL; 91 ppm->pages_tbl = (page_t*)( ppm->vaddr_base + 92 (pages_tbl_offset << CONFIG_PPM_PAGE_SHIFT) ); 93 93 94 94 // initialize all page descriptors in pages_tbl[]
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