Changeset 133
- Timestamp:
- Jul 3, 2017, 3:30:03 PM (7 years ago)
- File:
-
- 1 edited
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- Unmodified
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trunk/hal/tsar_mips32/drivers/soclib_xcu.c
r75 r133 8 8 * This file is part of ALMOS-MKH. 9 9 * 10 * ALMOS-MKH .is free software; you can redistribute it and/or modify it10 * ALMOS-MKH is free software; you can redistribute it and/or modify it 11 11 * under the terms of the GNU General Public License as published by 12 12 * the Free Software Foundation; version 2.0 of the License. 13 13 * 14 * ALMOS-MKH .is distributed in the hope that it will be useful, but14 * ALMOS-MKH is distributed in the hope that it will be useful, but 15 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU … … 27 27 #include <chdev.h> 28 28 29 30 31 29 //////////////////////////////////// 32 30 void soclib_xcu_init( chdev_t * icu, … … 34 32 { 35 33 // get local ICU segment base address 36 34 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 37 35 38 36 // disable all IRQs … … 49 47 { 50 48 // get XCU segment base address 51 49 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 52 50 53 51 // write into register 54 55 56 52 if ( type == WTI_TYPE ) base[XCU_MSK_WTI_DISABLE << 5 | lid] = mask; 53 else if( type == HWI_TYPE ) base[XCU_MSK_HWI_DISABLE << 5 | lid] = mask; 54 else base[XCU_MSK_PTI_DISABLE << 5 | lid] = mask; 57 55 } 58 56 … … 64 62 { 65 63 // get XCU segment base address 66 64 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 67 65 68 66 // write into register 69 70 71 67 if ( type == WTI_TYPE ) base[XCU_MSK_WTI_ENABLE << 5 | lid] = mask; 68 else if( type == HWI_TYPE ) base[XCU_MSK_HWI_ENABLE << 5 | lid] = mask; 69 else base[XCU_MSK_PTI_ENABLE << 5 | lid] = mask; 72 70 } 73 71 … … 80 78 { 81 79 // get XCU segment base address 82 83 80 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 81 84 82 // get values from registers 85 *hwi_mask = base[XCU_MSK_HWI << 5 | lid]; 86 *wti_mask = base[XCU_MSK_WTI << 5 | lid]; 87 *pti_mask = base[XCU_MSK_PTI << 5 | lid]; 83 *hwi_mask = base[XCU_MSK_HWI << 5 | lid]; 84 *wti_mask = base[XCU_MSK_WTI << 5 | lid]; 85 *pti_mask = base[XCU_MSK_PTI << 5 | lid]; 88 86 } 89 87 … … 94 92 { 95 93 // get local ICU segment base address 96 94 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 97 95 98 96 // write into register … … 105 103 { 106 104 // get local ICU segment base address 107 105 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 108 106 109 107 // read from register 110 108 return base[XCU_PTI_ACK << 5 | index]; 111 109 } 112 110 … … 118 116 uint32_t * pti_status ) 119 117 { 120 // get local ICU segment base address 118 // get local ICU segment base address 121 119 uint32_t * base = (uint32_t *)GET_PTR( icu->base ); 122 120 123 121 // read PRIO register 124 122 uint32_t prio = base[XCU_PRIO << 5 | lid]; 125 123 126 124 *wti_status = (prio & 0x4) ? (((prio >> 24) & 0x1F) + 1) : 0; … … 140 138 xptr_t xp_base = (xptr_t)hal_remote_lwd( XPTR( cxy_icu , &ptr_icu->base ) ); 141 139 142 // get remote ICU segment local pointer 143 140 // get remote ICU segment local pointer 141 uint32_t * base = (uint32_t *)GET_PTR( xp_base ); 144 142 145 143 // send IPI to remote core 146 144 hal_remote_sw( XPTR( cxy_icu , &base[XCU_WTI_REG << 5 | lid] ) , 0 ); 147 145 } 148 146
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