- Timestamp:
- Jul 3, 2017, 5:21:06 PM (7 years ago)
- Location:
- trunk/hal/x86_64
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/x86_64/core/hal_apic.c
r117 r135 114 114 /* -------------------------------------------------------------------------- */ 115 115 116 size_t ioapic_pins __in_kdata = 0; 116 117 paddr_t ioapic_pa __in_kdata = 0; 117 118 vaddr_t ioapic_va __in_kdata = 0; … … 133 134 #define IOREDTBL 0x10 134 135 135 #define IOENTRY_DISABLE 0x10000136 137 136 void hal_ioapic_write(uint8_t reg, uint32_t val) 138 137 { … … 155 154 static void hal_ioapic_init() 156 155 { 157 size_t i, pins;158 156 uint32_t ver; 157 size_t i; 159 158 160 159 ioapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared … … 163 162 164 163 ver = hal_ioapic_read(IOAPICVER); 165 pins = ((ver >> 16) & 0xFF) + 1;164 ioapic_pins = ((ver >> 16) & 0xFF) + 1; 166 165 167 166 /* Explicitly disable (mask) each vector */ 168 for (i = 0; i < pins; i++) {167 for (i = 0; i < ioapic_pins; i++) { 169 168 hal_ioapic_set_entry(i, IOENTRY_DISABLE); 170 169 } 170 171 x86_printf("IOAPICPINS: #%z\n", ioapic_pins); 171 172 172 173 /* Now, enable the keyboard */ … … 205 206 /* Initialize the LAPIC timer to the maximum value */ 206 207 hal_lapic_write(LAPIC_ICR_TIMER, 0xFFFFFFFF); 208 209 /* Initialize the PIT */ 210 hal_pit_init(); 207 211 208 212 pittick = hal_pit_timer_read() + 1; … … 239 243 * - APIC internal error (ERR) 240 244 * - Extended (Implementation dependent) 245 * Only the Spurious and APIC Timer interrupts are enabled. 241 246 */ 242 247 static void hal_lapic_init() -
trunk/hal/x86_64/core/hal_apic.h
r89 r135 21 21 22 22 #ifndef x86_ASM 23 void hal_ioapic_set_entry(uint8_t index, uint64_t data); 24 23 25 uint32_t hal_lapic_gid(); 24 26 void hal_apic_init(); 25 27 #endif 28 29 /* 30 ******************************************************************************* 31 * IOAPIC 32 ******************************************************************************* 33 */ 34 35 #define IOENTRY_DISABLE 0x10000 36 37 38 /* 39 ******************************************************************************* 40 * LAPIC 41 ******************************************************************************* 42 */ 26 43 27 44 #define LAPIC_SPURIOUS_VECTOR LAPICVEC_MIN -
trunk/hal/x86_64/core/hal_init.c
r119 r135 80 80 } 81 81 82 /* -------------------------------------------------------------------------- */ 83 84 static void init_bootinfo_icu(boot_device_t *dev) 85 { 86 memset(dev, 0, sizeof(boot_device_t)); 87 88 dev->base = NULL; /* XXX */ 89 dev->type = (DEV_FUNC_ICU << 16) | IMPL_ICU_XCU; 90 dev->channels = 1; 91 dev->param0 = 0; 92 dev->param1 = 0; 93 dev->param2 = 0; 94 dev->param3 = 0; 95 96 #ifdef NOTYET 97 uint32_t irqs; /*! number of input IRQs */ 98 boot_irq_t irq[32]; /*! array of input IRQS (PIC and ICU only) */ 99 #endif 100 } 101 82 102 static size_t init_bootinfo_pages_nr() 83 103 { … … 190 210 info->rsvd_nr = init_bootinfo_rsvd(&info->rsvd); 191 211 192 /* dev_ XXX */ 212 init_bootinfo_icu(&info->dev_icu); 213 /* TODO: dev_mmc */ 214 /* TODO: dev_dma */ 215 193 216 offset = hal_gpt_bootstrap_uniformize(); 194 217 info->pages_offset = offset / PAGE_SIZE; -
trunk/hal/x86_64/drivers/soclib_xcu.c
r129 r135 27 27 #include <chdev.h> 28 28 29 #include <hal_apic.h> 29 30 #include <hal_internal.h> 30 31 31 void soclib_xcu_init( chdev_t * icu, 32 lid_t lid ) 32 extern size_t ioapic_pins; 33 34 void soclib_xcu_init(chdev_t *icu, lid_t lid) 33 35 { 36 size_t i; 37 38 /* disable all IRQs */ 39 for (i = 0; i < ioapic_pins; i++) { 40 hal_ioapic_set_entry(i, IOENTRY_DISABLE); 41 } 42 34 43 x86_panic((char *)__func__); 35 44 }
Note: See TracChangeset
for help on using the changeset viewer.