Changeset 138 for trunk/hal/x86_64

Timestamp:

Jul 4, 2017, 12:05:39 PM (7 years ago)

Author:

max@…

Message:

update

Location:

trunk/hal/x86_64

Files:

• core/hal_apic.c (modified) (1 diff)
• core/hal_apic.h (modified) (2 diffs)
• core/hal_init.c (modified) (3 diffs)
• core/hal_kentry.S (modified) (2 diffs)
• core/hal_kentry.h (modified) (1 diff)
• core/hal_segmentation.h (modified) (1 diff)
• core/hal_special.c (modified) (2 diffs)
• drivers/soclib_xcu.c (modified) (8 diffs)

trunk/hal/x86_64/core/hal_apic.c

@@ -280 +280 @@
         hal_lapic_write(LAPIC_TPR, 0);
         hal_lapic_write(LAPIC_EOI, 0);
-        hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|LAPIC_SPURIOUS_VECTOR);
+        hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|VECTOR_APIC_SPURIOU);
 
         /* Explicitly disable (mask) each vector */

trunk/hal/x86_64/core/hal_apic.h

@@ -30 +30 @@
 /*
  *******************************************************************************
- * IOAPIC
+ * Fake APIC status, used by XCU (soft)
  *******************************************************************************
  */
-
-
-
+#define APIC_FAKE_STATUS_HWI    0x1000
+#define APIC_FAKE_STATUS_WTI    0x2000
+#define APIC_FAKE_STATUS_PTI    0x4000
 
 /*
@@ -42 +42 @@
  *******************************************************************************
  */
-
-#define LAPIC_SPURIOUS_VECTOR   LAPICVEC_MIN
-#define LAPIC_TIMER_VECTOR      (LAPICVEC_MIN + 1)
-#define IOAPIC_KEYBOARD_VECTOR  (LAPICVEC_MIN + 2)
 
 #define LAPIC_ID                0x020   /* ID. RW */

trunk/hal/x86_64/core/hal_init.c

@@ -95 +95 @@
         dev->channels = 1;
 
+#if NOTYET
         /*
          * Give 20% of the pins to HWI, 80% to WTI.
@@ -100 +101 @@
         dev->param0 = (ioapic_pins * 20) / 100;  /* hwi_nr */
         dev->param1 = ioapic_pins - dev->param0; /* wti_nr */
+#else
+        dev->param0 = 1; /* hwi_nr */
+        dev->param1 = 1; /* wti_nr */
+#endif
 
         /*
@@ -421 +426 @@
         }
 
-        /* LAPIC interrupts */
-        for (i = LAPICVEC_MIN; i < LAPICVEC_MAX; i++) {
-                idt_set_seg(&idt[i], (void *)x86_intrs[i - LAPICVEC_MIN], 0,
+        /* Dynamically configured interrupts */
+        for (i = DYNVEC_MIN; i < DYNVEC_MAX; i++) {
+                idt_set_seg(&idt[i], (void *)x86_intrs[i - DYNVEC_MIN], 0,
                     SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL));
         }

trunk/hal/x86_64/core/hal_kentry.S

@@ -156 +156 @@
         iretq
 
+        /*
+         * The XCU interrupt entries.
+         */
+
+#define XCU_WTI_ENTRY(n)                \
+ASM_ENTRY(x86_xcu_wti_ ## n)            \
+        pushq   $0              ;       \
+        pushq   $T_ASTFLT       ;       \
+        INTR_SAVE_REGS          ;       \
+                                ;       \
+        movq    $(APIC_FAKE_STATUS_WTI|n),CPUVAR(APIC_FAKE_STATUS);     \
+        call    hal_do_interrupt;       \
+                                ;       \
+        INTR_RESTORE_REGS       ;       \
+        addq    $16,%rsp        ;       \
+        iretq
+
+#define XCU_HWI_ENTRY(n)                \
+ASM_ENTRY(x86_xcu_hwi_ ## n)            \
+        pushq   $0              ;       \
+        pushq   $T_ASTFLT       ;       \
+        INTR_SAVE_REGS          ;       \
+                                ;       \
+        movq    $(APIC_FAKE_STATUS_HWI|n),CPUVAR(APIC_FAKE_STATUS);     \
+        call    hal_do_interrupt;       \
+                                ;       \
+        INTR_RESTORE_REGS       ;       \
+        addq    $16,%rsp        ;       \
+        iretq
+
+#define XCU_PTI_ENTRY(n)                \
+ASM_ENTRY(x86_xcu_pti_ ## n)            \
+        pushq   $0              ;       \
+        pushq   $T_ASTFLT       ;       \
+        INTR_SAVE_REGS          ;       \
+                                ;       \
+        movq    $(APIC_FAKE_STATUS_PTI|n),CPUVAR(APIC_FAKE_STATUS);     \
+        call    hal_do_interrupt;       \
+                                ;       \
+        INTR_RESTORE_REGS       ;       \
+        addq    $16,%rsp        ;       \
+        iretq
+
+XCU_WTI_ENTRY(0)
+XCU_HWI_ENTRY(0)
+XCU_PTI_ENTRY(0)
+
 /*
  * Arguments pushed on the stack:
@@ -198 +245 @@
 x86_intrs:
         .quad   x86_lapic_spurious
+        .quad   x86_xcu_wti_0
+        .quad   x86_xcu_hwi_0
+        .quad   x86_xcu_pti_0
+
         .quad   x86_lapic_timer
         .quad   x86_ioapic_keyboard

trunk/hal/x86_64/core/hal_kentry.h

@@ -44 +44 @@
 /* Trap's coming from user mode */
 #define T_USER  0x100
+
+#define CPU_INFO_APIC_FAKE_STATUS       8
+#define CPUVAR(off)     %gs:CPU_INFO_ ## off
 
 #define TF_REGSIZE      (19 * 8)

trunk/hal/x86_64/core/hal_segmentation.h

@@ -193 +193 @@
 #define CPUVEC_MIN      0
 #define CPUVEC_MAX      32      /* reserved entries for CPU exceptions */
-#define LAPICVEC_MIN    CPUVEC_MAX
-#define LAPICVEC_MAX    (LAPICVEC_MIN + 3)
+
+#define DYNVEC_MIN      CPUVEC_MAX
+#define DYNVEC_MAX      (DYNVEC_MIN + 6)
+
+#define VECTOR_APIC_SPURIOU     (DYNVEC_MIN + 0)
+#define VECTOR_APIC_XCU_WTI     (DYNVEC_MIN + 1)
+#define VECTOR_APIC_XCU_HWI     (DYNVEC_MIN + 2)
+#define VECTOR_APIC_XCU_PTI     (DYNVEC_MIN + 3)
+
+/* debug only, will be removed soon */
+#define LAPIC_TIMER_VECTOR              (DYNVEC_MIN + 4)
+#define IOAPIC_KEYBOARD_VECTOR  (DYNVEC_MIN + 5)
 
 #define NIDT    256     /* total number of IDT entries */

trunk/hal/x86_64/core/hal_special.c

@@ -31 +31 @@
 struct thread_s;
 
-typedef struct cpu_info {
+struct cpu_info {
         void *ci_self;
+        uint64_t apic_fake_status;
         uint32_t ci_gid;
         uint32_t ci_lid;
         struct thread_s *ci_thr;
-} cpu_info_t;
+} __packed;
+typedef struct cpu_info cpu_info_t;
 
 cpu_info_t cpu0 __in_kdata;
@@ -104 +106 @@
 {
         curcpu()->ci_thr = thread;
+}
+
+uint8_t hal_get_apic_fake_status()
+{
+        return curcpu()->apic_fake_status;
 }
 

trunk/hal/x86_64/drivers/soclib_xcu.c

@@ -1 +1 @@
 /*
- * soclib_xcu.c - soclib XCU driver API implementation.
+ * soclib_xcu.c - x86 XCU driver API implementation.
  *
- * Authors  Alain Greiner    (2016)
- *
- * Copyright (c) UPMC Sorbonne Universites
+ * Copyright (c) 2017 Maxime Villard
  *
  * This file is part of ALMOS-MKH.
  *
- * ALMOS-MKH.is free software; you can redistribute it and/or modify it
+ * ALMOS-MKH is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2.0 of the License.
  *
- * ALMOS-MKH.is distributed in the hope that it will be useful, but
+ * ALMOS-MKH is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
@@ -18 +16 @@
  *
  * You should have received a copy of the GNU General Public License
- * along with ALMOS-kernel; if not, write to the Free Software Foundation,
+ * along with ALMOS-MKH.; if not, write to the Free Software Foundation,
  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
@@ -28 +26 @@
 
 #include <hal_apic.h>
+#include <hal_segmentation.h>
 #include <hal_internal.h>
 
 extern size_t ioapic_pins;
-
-uint64_t apic_fake_status __in_kdata = 0;
 
 /*
@@ -40 +37 @@
 uint32_t wti_baseidx __in_kdata = 0;
 uint32_t pti_baseidx __in_kdata = 0;
+
+static uint32_t get_pin(uint32_t idx, uint32_t type)
+{
+        switch (type) {
+                case HWI_TYPE:
+                        return hwi_baseidx + idx;
+                case WTI_TYPE:
+                        return wti_baseidx + idx;
+                case PTI_TYPE:
+                        return pti_baseidx + idx;
+                default:
+                        x86_panic("get_pin: wrong type");
+                        return 0;
+        }
+}
 
 void soclib_xcu_init(chdev_t *icu, lid_t lid)
@@ -56 +68 @@
     lid_t lid)
 {
+        uint8_t dest = (uint8_t)lid; /* XXX */
         uint32_t pin;
+        uint8_t vec;
+
+        pin = get_pin(idx, type);
 
         switch (type) {
                 case HWI_TYPE:
-                        pin = hwi_baseidx + idx;
+                        vec = VECTOR_APIC_XCU_HWI;
                 case WTI_TYPE:
-                        pin = wti_baseidx + idx;
+                        vec = VECTOR_APIC_XCU_WTI;
                 case PTI_TYPE:
-                        pin = pti_baseidx + idx;
+                        vec = VECTOR_APIC_XCU_PTI;
                 default:
                         x86_panic("enabling wrong irq");
         }
+
+        hal_ioapic_set_entry(pin, vec, dest);
 
         x86_panic((char *)__func__);
@@ -75 +93 @@
     lid_t lid)
 {
+        uint32_t pin = get_pin(idx, type);
+
+        hal_ioapic_disable_entry(pin);
+
         x86_panic((char *)__func__);
 }
 
-void soclib_xcu_get_masks( chdev_t   * icu,
-                           lid_t       lid,
-                           uint32_t  * hwi_mask,
-                           uint32_t  * wti_mask,
-                           uint32_t  * pti_mask )
+void soclib_xcu_get_masks(chdev_t *icu, lid_t lid, uint32_t *hwi_mask,
+    uint32_t *wti_mask, uint32_t *pti_mask)
 {
         x86_panic((char *)__func__);
@@ -101 +120 @@
 }
 
-
-
-
-
 void soclib_xcu_get_status(chdev_t *icu, lid_t lid, uint32_t *hwi_status,
     uint32_t *wti_status, uint32_t *pti_status)
@@ -114 +129 @@
         x86_panic((char *)__func__);
 }
-
-
-
-
-
 
 void soclib_xcu_send_ipi( xptr_t  icu_xp,