Changeset 151


Ignore:
Timestamp:
Jul 5, 2017, 3:43:50 PM (7 years ago)
Author:
alain
Message:

Move the core specific hal_cpu_context_t & hafpu_context_t structures
from the igeneric hal_context.h file to the specific hal_context.c file.

Location:
trunk/hal
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/hal/generic/hal_context.h

    r17 r151  
    2828//        Generic Thread Context API definition (implementation in hal_context.c)
    2929//
    30 // A thread context is defined by the two (core specific) structures hal_context_t
    31 // and hal_uzone_t, defined in hal_context.c file, that are accessed with generic
     30// A thread context is defined by the two (core specific) structures hal_cpu_context_t
     31// and hal_fpu_context_t, defined in hal_context.c file, that are accessed with generic
    3232// void* pointers stored in the thread descriptor.
    3333// - the "hal_context_t" structure is used to store the CPU registers values that
    3434//   have not been saved in the stack by the interrupt handler.
    35 // - the "hal_uzone_t" structure is used to save the FPU registers when required.
     35// - the "hal_fpu_context_t" structure is used to save the FPU registers when required.
    3636//////////////////////////////////////////////////////////////////////////////////////////
    3737
    … …  
    3939
    4040struct thread_s;
    41 
    42 /****************************************************************************************
    43  * Define various SR values for TSAR-MIPS32
    44  ***************************************************************************************/
    45 
    46 #define SR_USR_MODE       0xFC11
    47 #define SR_USR_MODE_FPU   0x2000FC11
    48 #define SR_SYS_MODE       0xFC00
    49 
    50 /****************************************************************************************
    51  * This structure defines the cpu_context for TSAR MIPS32.
    52  * These registers are saved/restored at each context switch.
    53  * WARNING : update the hal_cpu_context_save() and hal_cpu_context_restore()
    54  *           functions when modifying this structure.
    55  ***************************************************************************************/
    56 
    57 typedef struct hal_cpu_context_s
    58 {
    59         uint32_t s0_16;      // slot 0
    60         uint32_t s1_17;      // slot 1
    61         uint32_t s2_18;      // slot 2
    62         uint32_t s3_19;      // slot 3
    63         uint32_t s4_20;      // slot 4
    64         uint32_t s5_21;      // slot 5
    65         uint32_t s6_22;      // slot 6
    66         uint32_t s7_23;      // slot 7
    67         uint32_t sp_29;      // slot 8
    68         uint32_t fp_30;      // slot 9
    69         uint32_t ra_31;      // slot 10
    70         uint32_t c0_sr;      // slot 11
    71         uint32_t c0_th;      // slot 12
    72         uint32_t c2_ptpr;    // slot 13
    73         uint32_t c2_mode;    // slot 14
    74 }
    75 hal_cpu_context_t;
    76 
    77 /****************************************************************************************
    78  * This structure defines the fpu_context for TSAR MIPS32.
    79  ***************************************************************************************/
    80 
    81 typedef struct hal_fpu_context_s
    82 {
    83         uint32_t   fpu_regs[32];     
    84 }
    85 hal_fpu_context_t;
    8641
    8742/****************************************************************************************

  • trunk/hal/tsar_mips32/core/hal_context.c

    r62 r151  
    3333
    3434#include <hal_context.h>
     35
     36/////////////////////////////////////////////////////////////////////////////////////////
     37//       Define various SR values for TSAR-MIPS32
     38/////////////////////////////////////////////////////////////////////////////////////////
     39
     40#define SR_USR_MODE       0xFC11
     41#define SR_USR_MODE_FPU   0x2000FC11
     42#define SR_SYS_MODE       0xFC00
     43
     44/////////////////////////////////////////////////////////////////////////////////////////
     45// This structure defines the cpu_context for TSAR MIPS32.
     46// These registers are saved/restored at each context switch.
     47// WARNING : update the hal_cpu_context_save() and hal_cpu_context_restore()
     48//           functions when modifying this structure.
     49/////////////////////////////////////////////////////////////////////////////////////////
     50
     51typedef struct hal_cpu_context_s
     52{
     53        uint32_t s0_16;      // slot 0
     54        uint32_t s1_17;      // slot 1
     55        uint32_t s2_18;      // slot 2
     56        uint32_t s3_19;      // slot 3
     57        uint32_t s4_20;      // slot 4
     58        uint32_t s5_21;      // slot 5
     59        uint32_t s6_22;      // slot 6
     60        uint32_t s7_23;      // slot 7
     61        uint32_t sp_29;      // slot 8
     62        uint32_t fp_30;      // slot 9
     63        uint32_t ra_31;      // slot 10
     64        uint32_t c0_sr;      // slot 11
     65        uint32_t c0_th;      // slot 12
     66        uint32_t c2_ptpr;    // slot 13
     67        uint32_t c2_mode;    // slot 14
     68}
     69hal_cpu_context_t;
     70
     71/////////////////////////////////////////////////////////////////////////////////////////
     72// This structure defines the fpu_context for TSAR MIPS32.
     73/////////////////////////////////////////////////////////////////////////////////////////
     74
     75typedef struct hal_fpu_context_s
     76{
     77        uint32_t   fpu_regs[32];     
     78}
     79hal_fpu_context_t;
    3580
    3681//////////////////////////////////////////////////////////
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