Changeset 23 for trunk/hal/tsar_mips32

Timestamp:

Jun 18, 2017, 10:06:41 PM (8 years ago)

Author:

alain

Message:

Introduce syscalls.

Location:

trunk/hal/tsar_mips32

Files:

• hal_atomic.c (modified) (1 diff)
• hal_gpt.c (modified) (5 diffs)

trunk/hal/tsar_mips32/hal_atomic.c

@@ -79 +79 @@
 }
 
-///////////////////////////////////////
-int32_t hal_atomic_inc( uint32_t * ptr)
-{
-        return hal_atomic_add( ptr , 1 );
-}
-
-///////////////////////////////////////
-int32_t hal_atomic_dec( uint32_t * ptr)
-{
-        return hal_atomic_add( ptr , -1 );
-}
-
 //////////////////////////////////////
 bool_t hal_atomic_cas( uint32_t * ptr,

trunk/hal/tsar_mips32/hal_gpt.c

@@ -162 +162 @@
 
     // compute is_ref 
-    is_ref = process->is_ref;
+    is_ref = ( GET_CXY( process->ref_xp ) == local_cxy );
 
     // get pointer on PT1
@@ -238 +238 @@
 
     printk("*** Page Table for process %x in cluster %x ***\n",
-           CURRENT_PROCESS->pid , local_cxy );
+           CURRENT_THREAD->process->pid , local_cxy );
 
     pt1 = (uint32_t *)gpt->ptr;
@@ -539 +539 @@
             req.flags = AF_KERNEL | AF_ZERO;
             page = (page_t *)kmem_alloc( &req );
+
         if( page == NULL )
         {
@@ -545 +546 @@
             return ENOMEM;
         }
+
         pt2_ppn = ppm_page2ppn( page );
         pt2     = ppm_page2base( page );
@@ -665 +667 @@
 }  // end hal_gpt_unlock_pte()
 
-
-
-
-
-
-
-
+///////////////////////////////////////
+error_t hal_gpt_copy( gpt_t  * dst_gpt,
+                      gpt_t  * src_gpt,
+                      bool_t   cow )
+{
+    uint32_t     ix1;       // index in PT1
+    uint32_t     ix2;       // index in PT2
+
+        uint32_t   * src_pt1;   // local pointer on PT1 for SRC_GPT 
+        uint32_t   * dst_pt1;   // local pointer on PT1 for DST_GPT
+    uint32_t   * dst_pt2;   // local pointer on PT2 for DST_GPT
+    uint32_t   * src_pt2;   // local pointer on PT2 for SRC_GPT
+
+    uint32_t     pte1;
+    uint32_t     pte2_attr;
+    uint32_t     pte2_ppn;
+    uint32_t     pte2_writable;
+
+    page_t     * page;
+
+    ppn_t        src_pt2_ppn;
+    ppn_t        dst_pt2_ppn;
+
+    // get pointers on PT1 for src_gpt & dst_gpt
+    src_pt1 = (uint32_t *)src_gpt->ptr;
+    dst_pt1 = (uint32_t *)dst_gpt->ptr;
+
+    // scan the SRC_PT1
+        for( ix1 = 0 ; ix1 < 2048 ; ix1++ )
+        {
+        pte1 = src_pt1[ix1];
+                if( (pte1 & GPT_MAPPED) != 0 )
+        {
+            if( (pte1 & GPT_SMALL) == 0 )  // PTE1 => big kernel page
+            {
+                // big kernel pages are shared by all processes => copy it
+                dst_pt1[ix1] = pte1;
+            }
+            else                           // PTD1 => smal pages
+            {
+                // allocate one physical page for a PT2 in DST_GPT
+                    kmem_req_t req;
+                    req.type  = KMEM_PAGE;
+                    req.size  = 0;                     // 1 small page 
+                    req.flags = AF_KERNEL | AF_ZERO;
+                    page = (page_t *)kmem_alloc( &req );
+
+                if( page == NULL )
+                {
+                    // TODO release all memory allocated to DST_GPT
+                                printk("\n[ERROR] in %s : cannot allocate PT2\n", __FUNCTION__ );
+                    return ENOMEM;
+                }
+
+                // get pointer on new PT2 in DST_GPT
+                dst_pt2 = (uint32_t *)ppm_page2base( page );
+
+                // set a new PTD1 in DST_GPT
+                dst_pt2_ppn  = (ppn_t)ppm_page2ppn( page );
+                dst_pt1[ix1] = TSAR_MMU_PRESENT | TSAR_MMU_PTD1 | dst_pt2_ppn;
+
+                // get pointer on PT2 in SRC_GPT
+                src_pt2_ppn = (ppn_t)TSAR_MMU_PTBA_FROM_PTE1( pte1 );
+                src_pt2     = (uint32_t *)ppm_ppn2base( src_pt2_ppn );
+
+                // scan the SRC_PT2
+                for( ix2 = 0 ; ix2 < 512 ; ix2++ )
+                {
+                    // get attr & ppn from PTE2
+                    pte2_attr = TSAR_MMU_ATTR_FROM_PTE2( src_pt2[2 * ix2] );
+
+                            if( (pte2_attr & GPT_MAPPED) != 0 )  // valid PTE2 in SRC_GPT
+                    {
+                        // get GPT_WRITABLE & PPN
+                        pte2_writable = pte2_attr & GPT_WRITABLE;
+                        pte2_ppn      = TSAR_MMU_PPN_FROM_PTE2(  src_pt2[2 * ix2 + 1] );
+
+                        // set a new PTE2 in DST_GPT
+                        dst_pt2[2*ix2]     = pte2_attr;
+                        dst_pt2[2*ix2 + 1] = pte2_ppn;
+                        
+                        // handle Copy-On-Write
+                        if( cow && pte2_writable )
+                        {
+                            // reset GPT_WRITABLE in both SRC_GPT and DST_GPT
+                            hal_atomic_and( &dst_pt2[2*ix2] , ~GPT_WRITABLE );
+                            hal_atomic_and( &src_pt2[2*ix2] , ~GPT_WRITABLE );
+
+                            // register PG_COW in page descriptor
+                            page = ppm_ppn2page( pte2_ppn );
+                            hal_atomic_or( &page->flags , PG_COW );
+                                                        hal_atomic_add( &page->fork_nr , 1 );
+                        }
+                    }
+                }  // end loop on ix2
+            } 
+        }
+    }  // end loop ix1
+
+    hal_wbflush();
+
+    return 0;
+
+}  // end hal_gpt_copy()
+