- Timestamp:
- Aug 1, 2017, 10:30:39 AM (7 years ago)
- Location:
- trunk/hal/x86_64/core
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/x86_64/core/hal_exception.c
r276 r308 74 74 x86_printf("%s\n", (char *)buf); 75 75 x86_printf("-> rip = %Z\n", ctx->tf_rip); 76 x86_printf("-> rsp = %Z\n", ctx->tf_rsp); 76 x86_printf("-> rdi = %Z\n", ctx->tf_rdi); 77 x86_printf("-> rbp = %Z\n", ctx->tf_rbp); 77 78 x86_printf("-> tls = %Z (gid=%Z)\n", (uint64_t)curcpu(), 78 79 (uint64_t)hal_get_gid()); -
trunk/hal/x86_64/core/hal_init.c
r298 r308 26 26 #include <hal_acpi.h> 27 27 #include <hal_apic.h> 28 #include <hal_kentry.h> 28 29 #include <hal_internal.h> 29 30 #include <hal_register.h> … … 447 448 static void 448 449 gdt_set_memseg(struct gdt_memseg *sd, void *base, size_t limit, 449 int type, int dpl, int gran, int is64)450 int type, int dpl, int gran, bool_t is64) 450 451 { 451 452 sd->sd_lolimit = (unsigned)limit; … … 457 458 sd->sd_avl = 0; 458 459 sd->sd_long = is64; 459 sd->sd_def32 = 0;460 sd->sd_def32 = !is64; 460 461 sd->sd_gran = gran; 461 462 sd->sd_hibase = (unsigned long)base >> 24; … … 483 484 /* Flat segments */ 484 485 gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KCODE_SEL), 0, 485 0xfffff, SDT_MEMERA, SEL_KPL, 1, 1);486 0xfffff, SDT_MEMERA, SEL_KPL, 1, true); 486 487 gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KDATA_SEL), 0, 487 0xfffff, SDT_MEMRWA, SEL_KPL, 1, 1); 488 0xfffff, SDT_MEMRWA, SEL_KPL, 1, true); 489 gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UCODE32_SEL), 0, 490 0xfffff, SDT_MEMERA, SEL_UPL, 1, false); 488 491 gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UCODE_SEL), 0, 489 0xfffff, SDT_MEMERA, SEL_UPL, 1, 1);492 0xfffff, SDT_MEMERA, SEL_UPL, 1, true); 490 493 gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UDATA_SEL), 0, 491 0xfffff, SDT_MEMRWA, SEL_UPL, 1, 1);494 0xfffff, SDT_MEMRWA, SEL_UPL, 1, true); 492 495 } 493 496 … … 625 628 void cpu_tls_init(size_t lid) 626 629 { 630 extern uint64_t x86_syscall; 631 extern uint64_t x86_syscall32; 632 627 633 percpu_archdata_t *data = &cpudata[lid]; 628 634 tls_t *cputls = &data->tls; … … 635 641 cputls->tls_intr = INTRS_DISABLED; 636 642 643 /* syscall */ 644 wrmsr(MSR_STAR, 645 ((uint64_t)GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL) << 32) | 646 ((uint64_t)GDT_FIXED_SEL(GDT_UCODE32_SEL, SEL_UPL) << 48)); 647 wrmsr(MSR_LSTAR, (uint64_t)&x86_syscall); 648 wrmsr(MSR_CSTAR, (uint64_t)&x86_syscall32); 649 wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 650 651 /* TLS */ 637 652 wrmsr(MSR_FSBASE, 0); 638 653 wrmsr(MSR_GSBASE, (uint64_t)cputls); -
trunk/hal/x86_64/core/hal_kentry.S
r234 r308 44 44 .type hal_com1_intr, @function 45 45 .type hal_keyboard_intr, @function 46 47 /* 48 * Syscall. 49 */ 50 ASM_ENTRY(x86_syscall) 51 /* for now, panic */ 52 ZTRAPENTRY(T_RESERVED) 53 54 ASM_ENTRY(x86_syscall32) 55 /* for now, panic */ 56 ZTRAPENTRY(T_RESERVED) 46 57 47 58 /* -
trunk/hal/x86_64/core/hal_kentry.h
r234 r308 47 47 #define CPUVAR(off) %gs:CPU_INFO_ ## off 48 48 49 /* 50 * Processor Status Longword. 51 */ 52 #define PSL_C 0x00000001 /* carry flag */ 53 #define PSL_PF 0x00000004 /* parity flag */ 54 #define PSL_AF 0x00000010 /* auxiliary carry flag */ 55 #define PSL_Z 0x00000040 /* zero flag */ 56 #define PSL_N 0x00000080 /* sign flag */ 57 #define PSL_T 0x00000100 /* trap flag */ 58 #define PSL_I 0x00000200 /* interrupt enable flag */ 59 #define PSL_D 0x00000400 /* direction flag */ 60 #define PSL_V 0x00000800 /* overflow flag */ 61 #define PSL_IOPL 0x00003000 /* i/o privilege level */ 62 #define PSL_NT 0x00004000 /* nested task */ 63 #define PSL_RF 0x00010000 /* resume flag */ 64 #define PSL_VM 0x00020000 /* virtual 8086 mode */ 65 #define PSL_AC 0x00040000 /* alignment check flag */ 66 #define PSL_VIF 0x00080000 /* virtual interrupt enable flag */ 67 #define PSL_VIP 0x00100000 /* virtual interrupt pending flag */ 68 #define PSL_ID 0x00200000 /* identification flag */ 69 70 #define PSL_MBO 0x00000002 /* must be one bits */ 71 #define PSL_MBZ 0xffc08028 /* must be zero bits */ 72 73 #define PSL_USERSET (PSL_MBO | PSL_I) 74 75 /* 76 * Trap frame 77 */ 78 49 79 #define TF_REGSIZE (19 * 8) 50 51 #define PSL_I 0x0000020052 #define PSL_MBO 0x0000000253 #define PSL_USERSET (PSL_MBO | PSL_I)54 80 55 81 #define INTR_SAVE_REGS \ -
trunk/hal/x86_64/core/hal_segmentation.h
r274 r308 27 27 #define GDT_KCODE_SEL 1 /* Kernel code descriptor */ 28 28 #define GDT_KDATA_SEL 2 /* Kernel data descriptor */ 29 #define GDT_UCODE_SEL 3 /* User code descriptor */ 30 #define GDT_UDATA_SEL 4 /* User data descriptor */ 29 #define GDT_UCODE32_SEL 3 /* User code descriptor - 32bit */ 30 #define GDT_UCODE_SEL 4 /* User code descriptor */ 31 #define GDT_UDATA_SEL 5 /* User data descriptor */ 31 32 #define NGDT_MEM 6 /* aligned */ 32 33
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