- Timestamp:
- Aug 3, 2017, 10:15:18 AM (7 years ago)
- Location:
- trunk/hal
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/generic/hal_gpt.h
r313 r315 69 69 typedef struct gpt_s 70 70 { 71 void * ptr; /*! pointer on GPT root (must be page aligned)*/71 void * ptr; /*! local pointer on GPT root */ 72 72 ppn_t ppn; /*! PPN of GPT root */ 73 struct page_s * page; /*! pointer on page descriptor for GPT root*/73 struct page_s * page; /*! local pointer on GPT root page descriptor */ 74 74 } 75 75 gpt_t; -
trunk/hal/generic/hal_ppm.h
r313 r315 62 62 void hal_core_init( boot_info_t * info ); 63 63 64 /*****************************************************************************************65 * This function returns the PPN from the page descriptor extended pointer.66 *****************************************************************************************67 * @ page_xp : pointer to page descriptor68 * @ returns physical page number69 ****************************************************************************************/70 inline ppn_t hal_page2ppn( xptr_t page_xp );71 72 /*****************************************************************************************73 * This function returns the page descriptor extended pointer from the PPN.74 *****************************************************************************************75 * @ ppn : physical page number76 * @ returns extended pointer on page descriptor77 ****************************************************************************************/78 inline xptr_t hal_ppn2page( ppn_t ppn );79 80 64 #endif /* HAL_PPM_H_ */ -
trunk/hal/tsar_mips32/core/hal_gpt.c
r124 r315 69 69 #define TSAR_MMU_IX2_FROM_VPN( vpn ) (vpn & 0x1FF) 70 70 71 #define TSAR_MMU_PTBA_FROM_PTE1( pte1 ) (pte1 & 0x FFFFFFF)72 #define TSAR_MMU_PPN_FROM_PTE1( pte1 ) ((pte1 & 0x 7FFFF)<<9)71 #define TSAR_MMU_PTBA_FROM_PTE1( pte1 ) (pte1 & 0x0FFFFFFF) 72 #define TSAR_MMU_PPN_FROM_PTE1( pte1 ) ((pte1 & 0x0007FFFF)<<9) 73 73 #define TSAR_MMU_ATTR_FROM_PTE1( pte1 ) (pte1 & 0xFFC00000) 74 74 … … 99 99 { 100 100 page_t * page; 101 xptr_t page_xp; 101 102 102 103 // check page size … … 121 122 122 123 // initialize generic page table descriptor 123 gpt->ptr = ppm_page2vaddr( page ); 124 gpt->ppn = ppm_page2ppn( page ); 125 gpt->page = page; 124 page_xp = XPTR( local_cxy , page ); 125 126 gpt->ptr = GET_PTR( ppm_page2base( page_xp ) ); 127 gpt->ppn = ppm_page2ppn( page_xp ); 128 gpt->page = GET_PTR( page_xp ); 126 129 127 130 // initialize PTE entries attributes masks … … 191 194 else // SMALL page 192 195 { 193 // get pointer on PT2196 // get local pointer on PT2 194 197 pt2_ppn = TSAR_MMU_PTBA_FROM_PTE1( pte1 ); 195 pt2 = ppm_ppn2vaddr( pt2_ppn ); 198 xptr_t base_xp = ppm_ppn2base( pt2_ppn ); 199 pt2 = (uint32_t *)GET_PTR( base_xp ); 196 200 197 201 // scan the PT2 to release all entries VALID and USER if reference cluster … … 212 216 // release the PT2 213 217 req.type = KMEM_PAGE; 214 req.ptr = ppm_vaddr2page( pt2);218 req.ptr = GET_PTR( ppm_base2page( XPTR(local_cxy , pt2 ) ) ); 215 219 kmem_free( &req ); 216 220 } … … 220 224 // release the PT1 221 225 req.type = KMEM_PAGE; 222 req.ptr = ppm_vaddr2page( pt1);226 req.ptr = GET_PTR( ppm_base2page( XPTR(local_cxy , pt1 ) ) ); 223 227 kmem_free( &req ); 224 228 … … 255 259 { 256 260 pt2_ppn = TSAR_MMU_PTBA_FROM_PTE1( pte1 ); 257 pt2 = ppm_ppn2vaddr( pt2_ppn ); 261 xptr_t base_xp = ppm_ppn2base ( pt2_ppn ); 262 pt2 = (uint32_t *)GET_PTR( base_xp ); 258 263 259 264 // scan the PT2 … … 288 293 289 294 uint32_t small; // requested PTE is for a small page 290 bool_t atomic; // 295 bool_t atomic; 296 291 297 page_t * page; // pointer on new physical page descriptor 298 xptr_t page_xp; // extended pointer on new page descriptor 292 299 293 300 uint32_t ix1; // index in PT1 … … 338 345 return ENOMEM; 339 346 } 340 pt2_ppn = ppm_page2ppn( page ); 341 pt2 = ppm_page2vaddr( page ); 347 348 page_xp = XPTR( local_cxy , page ); 349 pt2_ppn = ppm_page2ppn( page_xp ); 350 pt2 = (uint32_t *)GET_PTR( ppm_page2base( page_xp ) ); 342 351 343 352 // try to atomicaly set a PTD1 in the PT1 entry … … 361 370 362 371 // compute pointer on PT2 base 363 pt2 = (uint32_t*) ppm_ppn2vaddr( pt2_ppn);372 pt2 = (uint32_t*)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 364 373 } 365 374 } … … 378 387 379 388 // compute pointer on PT2 base 380 pt2 = (uint32_t*) ppm_ppn2vaddr( pt2_ppn);389 pt2 = (uint32_t*)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 381 390 } 382 391 … … 424 433 // compute PT2 base address 425 434 pt2_ppn = TSAR_MMU_PTBA_FROM_PTE1( pte1 ); 426 pt2 = (uint32_t*) ppm_ppn2vaddr( pt2_ppn);435 pt2 = (uint32_t*)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 427 436 428 437 *ppn = pt2[2*ix2+1] & ((1<<TSAR_MMU_PPN_WIDTH)-1); … … 478 487 // compute PT2 base address 479 488 pt2_ppn = TSAR_MMU_PTBA_FROM_PTE1( pte1 ); 480 pt2 = (uint32_t*) ppm_ppn2vaddr( pt2_ppn);489 pt2 = (uint32_t*)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 481 490 482 491 // get PPN … … 514 523 bool_t atomic; 515 524 page_t * page; 525 xptr_t page_xp; 516 526 517 527 uint32_t ix1 = TSAR_MMU_IX1_FROM_VPN( vpn ); // index in PT1 … … 547 557 } 548 558 549 pt2_ppn = ppm_page2ppn( page ); 550 pt2 = ppm_page2vaddr( page ); 559 page_xp = XPTR( local_cxy , page ); 560 pt2_ppn = ppm_page2ppn( page_xp ); 561 pt2 = (uint32_t *)GET_PTR( ppm_page2base( page_xp ) ); 551 562 552 563 // try to set the PT1 entry … … 568 579 // get the PT2 base address 569 580 pt2_ppn = TSAR_MMU_PPN_FROM_PTE1( pte1 ); 570 pt2 = (uint32_t*) ppm_ppn2vaddr( pt2_ppn);581 pt2 = (uint32_t*)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 571 582 } 572 583 } … … 585 596 586 597 // compute pointer on PT2 base 587 pt2 = (uint32_t *)ppm_ppn2vaddr( pt2_ppn);598 pt2 = (uint32_t *)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 588 599 } 589 600 … … 645 656 // get pointer on PT2 base 646 657 pt2_ppn = TSAR_MMU_PPN_FROM_PTE1( pte1 ); 647 pt2 = ppm_ppn2vaddr( pt2_ppn);658 pt2 = (uint32_t *)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 648 659 649 660 // get pointer on PTE2 … … 686 697 687 698 page_t * page; 699 xptr_t page_xp; 688 700 689 701 ppn_t src_pt2_ppn; … … 721 733 } 722 734 735 // get extended pointer on page descriptor 736 page_xp = XPTR( local_cxy , page ); 737 723 738 // get pointer on new PT2 in DST_GPT 724 dst_pt2 = (uint32_t *)ppm_page2vaddr( page ); 739 xptr_t base_xp = ppm_page2base( page_xp ); 740 dst_pt2 = (uint32_t *)GET_PTR( base_xp ); 725 741 726 742 // set a new PTD1 in DST_GPT 727 dst_pt2_ppn = (ppn_t)ppm_page2ppn( page );743 dst_pt2_ppn = (ppn_t)ppm_page2ppn( page_xp ); 728 744 dst_pt1[ix1] = TSAR_MMU_PRESENT | TSAR_MMU_PTD1 | dst_pt2_ppn; 729 745 730 746 // get pointer on PT2 in SRC_GPT 731 747 src_pt2_ppn = (ppn_t)TSAR_MMU_PTBA_FROM_PTE1( pte1 ); 732 src_pt2 = (uint32_t *) ppm_ppn2vaddr( src_pt2_ppn);748 src_pt2 = (uint32_t *)GET_PTR( ppm_ppn2base( src_pt2_ppn ) ); 733 749 734 750 // scan the SRC_PT2 … … 756 772 757 773 // register PG_COW in page descriptor 758 page = ppm_ppn2page( pte2_ppn);774 page = (page_t *)GET_PTR( ppm_ppn2page( pte2_ppn ) ); 759 775 hal_atomic_or( &page->flags , PG_COW ); 760 776 hal_atomic_add( &page->fork_nr , 1 ); -
trunk/hal/tsar_mips32/core/hal_ppm.c
r313 r315 135 135 } // end hal_core_init() 136 136 137 ///////////////////////////////////////////138 inline ppn_t hal_page2ppn( xptr_t page_xp )139 {140 ppm_t * ppm = &LOCAL_CLUSTER->ppm;141 137 142 cxy_t page_cxy = GET_CXY( page_xp );143 page_t * page_ptr = (page_t *)GET_PTR( page_xp );144 145 return (ppn_t)(page_ptr - ppm->pages_tbl) | (ppn_t)(page_cxy << 20);146 147 } // end hal_page2ppn()148 149 ////////////////////////////////////////150 inline xptr_t hal_ppn2page( ppn_t ppn )151 {152 ppm_t * ppm = &LOCAL_CLUSTER->ppm;153 154 cxy_t page_cxy = (ppn & 0xFFF00000) >> 20;155 page_t * page_ptr = &ppm->pages_tbl[ppn & 0x000FFFFF];156 157 return XPTR( page_xy , page_ptr );158 159 } // end hal_ppn2page160 161 -
trunk/hal/tsar_mips32/core/hal_types.h
r226 r315 202 202 #define CXY_FROM_PADDR(paddr) ((cxy_t)((paddr) >> LPA_SHIFT)) 203 203 204 #define LPA_FROM_PADDR(paddr) (lpa_t)( (paddr & LPA_MASK)204 #define LPA_FROM_PADDR(paddr) (lpa_t)(paddr & LPA_MASK) 205 205 206 206 #define PADDR(cxy,lpa) (((uint64_t)(cxy) << LPA_SHIFT) | (((uint64_t)(lpa)) & LPA_MASK)) -
trunk/hal/tsar_mips32/core/hal_uspace.c
r300 r315 23 23 */ 24 24 25 #include <errno.h> 26 #include <vmm.h> 25 27 #include <hal_types.h> 26 28 #include <hal_uspace.h> … … 149 151 return EFAULT; 150 152 } 153 151 154 length = hal_strlen_from_uspace( u_src ); 152 155 if( length >= max_size ) -
trunk/hal/x86_64/core/hal_types.h
r272 r315 218 218 #define CXY_FROM_PADDR(paddr) ((cxy_t)((paddr) >> LPA_SHIFT)) 219 219 #define LPA_FROM_PADDR(paddr) (lpa_t)((paddr & LPA_MASK) 220 #define PADDR(cxy,l ad) (((uint64_t)(cxy) << LPA_SHIFT) | (((uint64_t)(ptr)) & LPA_MASK))220 #define PADDR(cxy,lpa) (((uint64_t)(cxy) << LPA_SHIFT) | (((uint64_t)(lpa)) & LPA_MASK)) 221 221 222 222 #endif /* HAL_TYPES_H_ */
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