Index: trunk/hal/tsar_mips32/core/hal_gpt.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_gpt.c	(revision 315)
+++ trunk/hal/tsar_mips32/core/hal_gpt.c	(revision 391)
@@ -36,6 +36,4 @@
 ////////////////////////////////////////////////////////////////////////////////////////
 // This define the masks for the TSAR MMU PTE attributes. (from TSAR MMU specification)
-// the GPT masks are derived from the TSAR MMU PTE attributes
-// in the TSAR specific hal_gpt_create() function. 
 ////////////////////////////////////////////////////////////////////////////////////////
 
@@ -76,23 +74,4 @@
 #define TSAR_MMU_ATTR_FROM_PTE2( pte2 )    (pte2 & 0xFFC000FF)
 
-/****************************************************************************************
- * These global variables defines the masks for the Generic Page Table Entry attributes,
- * and must be defined in all GPT implementation.
- ***************************************************************************************/
-
-uint32_t  GPT_MAPPED;
-uint32_t  GPT_SMALL;
-uint32_t  GPT_READABLE;
-uint32_t  GPT_WRITABLE;  
-uint32_t  GPT_EXECUTABLE;
-uint32_t  GPT_CACHABLE; 
-uint32_t  GPT_USER;  
-uint32_t  GPT_DIRTY;
-uint32_t  GPT_ACCESSED;
-uint32_t  GPT_GLOBAL;
-uint32_t  GPT_COW;
-uint32_t  GPT_SWAP;
-uint32_t  GPT_LOCKED;
-
 /////////////////////////////////////
 error_t hal_gpt_create( gpt_t * gpt )
@@ -128,4 +107,5 @@
 	gpt->page = GET_PTR( page_xp );
 
+/*
     // initialize PTE entries attributes masks
     GPT_MAPPED     = TSAR_MMU_PRESENT;
@@ -142,5 +122,5 @@
     GPT_SWAP       = TSAR_MMU_SWAP;
     GPT_LOCKED     = TSAR_MMU_LOCKED;
-
+*/
 	return 0;
 } // end hal_gpt_create()
@@ -174,13 +154,13 @@
 	{
         pte1 = pt1[ix1];
-		if( (pte1 & GPT_MAPPED) != 0 )  // PTE1 valid
+		if( (pte1 & TSAR_MMU_PRESENT) != 0 )  // PTE1 valid
         {
-            if( (pte1 & GPT_SMALL) == 0 )   // BIG page
+            if( (pte1 & TSAR_MMU_PTD1) == 0 )   // BIG page
             {
-                if( (pte1 & GPT_USER) != 0 ) 
+                if( (pte1 & TSAR_MMU_USER) != 0 ) 
                 {
                     // warning message
                     printk("\n[WARNING] in %s : found an USER BIG page / ix1 = %d\n", 
-                           __FUNCTION__ , ix1 );
+                    __FUNCTION__ , ix1 );
 
                     // release the big physical page if reference cluster
@@ -192,5 +172,5 @@
                 }
             }
-            else                           // SMALL page
+            else                              // SMALL page
             {
                 // get local pointer on PT2
@@ -205,5 +185,5 @@
                     {
                         attr = TSAR_MMU_ATTR_FROM_PTE2( pt2[2 * ix2] );
-		                if( ((attr & GPT_MAPPED) != 0 ) && ((attr & GPT_USER) != 0) )  
+		                if( ((attr & TSAR_MMU_PRESENT) != 0 ) && ((attr & TSAR_MMU_USER) != 0) )  
                         {
                             // release the physical page
@@ -250,7 +230,7 @@
 	{
         pte1 = pt1[ix1];
-		if( (pte1 & GPT_MAPPED) != 0 )
+		if( (pte1 & TSAR_MMU_PRESENT) != 0 )
         {
-            if( (pte1 & GPT_SMALL) == 0 )  // BIG page
+            if( (pte1 & TSAR_MMU_PTD1) == 0 )  // BIG page
             {
                 printk(" - BIG   : pt1[%d] = %x\n", ix1 , pte1 );
@@ -267,5 +247,5 @@
                     pte2_attr = TSAR_MMU_ATTR_FROM_PTE2( pt2[2 * ix2] );
                     pte2_ppn  = TSAR_MMU_PPN_FROM_PTE2( pt2[2 * ix2 + 1] );
-		            if( (pte2_attr & GPT_MAPPED) != 0 )
+		            if( (pte2_attr & TSAR_MMU_PRESENT) != 0 )
                     {
                         printk(" - SMALL   : pt1[%d] = %x / pt2[%d] / pt2[%d]\n",
@@ -306,5 +286,5 @@
 
     pt1   = gpt->ptr;
-	small = (attr & GPT_SMALL);
+	small = (attr & TSAR_MMU_PTD1);
 
     // get PT1 entry value
@@ -331,5 +311,5 @@
     // From this point, the requested PTE is a PTE2 (small page)
 
-	if( (pte1 & GPT_MAPPED) == 0 )      // the PT1 entry is not valid
+	if( (pte1 & TSAR_MMU_PRESENT) == 0 )      // the PT1 entry is not valid
 	{
         // allocate one physical page for the PT2
@@ -376,5 +356,5 @@
 	{
         // This valid entry must be a PTD1
-        if( (pte1 & GPT_SMALL) == 0 )
+        if( (pte1 & TSAR_MMU_PTD1) == 0 )
         {
 			printk("\n[ERROR] in %s : set a small page in a big PT1 entry / PT1[%d] = %x\n",
@@ -418,5 +398,5 @@
     pte1 = pt1[ix1];
 
-	if( (pte1 & GPT_MAPPED) == 0 )   // PT1 entry not present
+	if( (pte1 & TSAR_MMU_PRESENT) == 0 )   // PT1 entry not present
 	{
 		*attr = 0;
@@ -424,5 +404,5 @@
 	}
 
-	if( (pte1 & GPT_SMALL) == 0 )     // it's a PTE1
+	if( (pte1 & TSAR_MMU_PTD1) == 0 )     // it's a PTE1
 	{
 		*attr = TSAR_MMU_ATTR_FROM_PTE1( pte1 );
@@ -454,6 +434,13 @@
     kmem_req_t req;
 
+    // get ix1 & ix2 indexes
     uint32_t   ix1 = TSAR_MMU_IX1_FROM_VPN( vpn );
     uint32_t   ix2 = TSAR_MMU_IX2_FROM_VPN( vpn );
+
+    // get pointer on calling process
+    process_t  * process = CURRENT_THREAD->process;
+
+    // compute is_ref 
+    bool_t is_ref = ( GET_CXY( process->ref_xp ) == local_cxy );
 
     // get PTE1 value 
@@ -461,10 +448,10 @@
     pte1     = pt1[ix1];
 
-	if( (pte1 & GPT_MAPPED) == 0 )   // PT1 entry not present
+	if( (pte1 & TSAR_MMU_PRESENT) == 0 )   // PT1 entry not present
 	{
 		return;
 	}
 
-	if( (pte1 & GPT_SMALL) == 0 )     // it's a PTE1
+	if( (pte1 & TSAR_MMU_PTD1) == 0 )      // it's a PTE1
 	{
         // get PPN 
@@ -475,13 +462,13 @@
 	    hal_fence();
 
-        // releases the big page
-        req.type  = KMEM_PAGE;
-	    req.size  = 9;
-        req.ptr   = (void*)(ppn << CONFIG_PPM_PAGE_SHIFT);
-	    kmem_free( &req );
+        // releases the physical page if local
+        // req.type  = KMEM_PAGE;
+	    // req.size  = 9;
+        // req.ptr   = (void*)(ppn << CONFIG_PPM_PAGE_SHIFT);
+	    // kmem_free( &req );
 
         return;
 	}
-    else                              // it's a PTD1
+    else                                   // it's a PTD1
     {
         // compute PT2 base address
@@ -493,14 +480,12 @@
 
         // unmap the small page
-	    pt2[2*ix2]   = 0;
-	    hal_fence();
-	    pt2[2*ix2+1] = 0;
-	    hal_fence();
-
-        // releases the small page
-        req.type  = KMEM_PAGE;
-	    req.size  = 0;
-        req.ptr   = (void*)(ppn << CONFIG_PPM_PAGE_SHIFT);
-	    kmem_free( &req );
+	    pt2[2*ix2]   = 0;            // only attr is reset
+	    hal_fence();        
+
+        // releases the small page 
+        // req.type  = KMEM_PAGE;
+	    // req.size  = 0;
+        // req.ptr   = (void*)(ppn << CONFIG_PPM_PAGE_SHIFT);
+	    // kmem_free( &req );
 
         return;
@@ -534,5 +519,5 @@
 
     // If present, the page must be small
-	if( ((pte1 & GPT_MAPPED) != 0) && ((pte1 & GPT_SMALL) == 0) )
+	if( ((pte1 & TSAR_MMU_PRESENT) != 0) && ((pte1 & TSAR_MMU_PTD1) == 0) )
     {
         printk("\n[ERROR] in %s : try to lock a big page / PT1[%d] = %x\n",
@@ -541,5 +526,5 @@
     }
 
-	if( (pte1 & GPT_MAPPED) == 0 )  // missing PT1 entry   
+	if( (pte1 & TSAR_MMU_PRESENT) == 0 )  // missing PT1 entry   
 	{
         // allocate one physical page for PT2
@@ -585,5 +570,5 @@
     {
         // This valid entry must be a PTD1
-        if( (pte1 & GPT_SMALL) == 0 )
+        if( (pte1 & TSAR_MMU_PTD1) == 0 )
         {
 			printk("\n[ERROR] in %s : set a small page in a big PT1 entry / PT1[%d] = %x\n",
@@ -647,5 +632,5 @@
 
     // check PTE1 present and small page
-    if( ((pte1 & GPT_MAPPED) == 0) || ((pte1 & GPT_SMALL) == 0) )
+    if( ((pte1 & TSAR_MMU_PRESENT) == 0) || ((pte1 & TSAR_MMU_PTD1) == 0) )
     {
         printk("\n[ERROR] in %s : try to unlock a big or undefined page / PT1[%d] = %x\n",
@@ -665,5 +650,5 @@
 
     // check PTE2 present and locked
-    if( ((attr & GPT_MAPPED) == 0) || ((attr & GPT_LOCKED) == 0) );
+    if( ((attr & TSAR_MMU_PRESENT) == 0) || ((attr & GPT_LOCKED) == 0) );
     {
         printk("\n[ERROR] in %s : try to unlock an undefined page / PT1[%d] = %x\n",
@@ -710,7 +695,7 @@
 	{
         pte1 = src_pt1[ix1];
-		if( (pte1 & GPT_MAPPED) != 0 )
+		if( (pte1 & TSAR_MMU_PRESENT) != 0 )
         {
-            if( (pte1 & GPT_SMALL) == 0 )  // PTE1 => big kernel page
+            if( (pte1 & TSAR_MMU_PTD1) == 0 )  // PTE1 => big kernel page
             {
                 // big kernel pages are shared by all processes => copy it
@@ -754,5 +739,5 @@
                     pte2_attr = TSAR_MMU_ATTR_FROM_PTE2( src_pt2[2 * ix2] );
 
-		            if( (pte2_attr & GPT_MAPPED) != 0 )  // valid PTE2 in SRC_GPT
+		            if( (pte2_attr & TSAR_MMU_PRESENT) != 0 )  // valid PTE2 in SRC_GPT
                     {
                         // get GPT_WRITABLE & PPN
