Changeset 432 for trunk/hal/tsar_mips32/drivers
- Timestamp:
- Feb 14, 2018, 3:39:35 PM (7 years ago)
- Location:
- trunk/hal/tsar_mips32/drivers
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/tsar_mips32/drivers/soclib_nic.c
r279 r432 49 49 50 50 // initialize Soclib NIC global registers 51 hal_remote_sw( XPTR( nic_cxy , &nic_ptr+ NIC_G_BC_ENABLE ) , 0 );52 hal_remote_sw( XPTR( nic_cxy , &nic_ptr+ NIC_G_RUN ) , 0 );51 hal_remote_sw( XPTR( nic_cxy , nic_ptr + NIC_GLOBAL_SPAN + NIC_G_BC_ENABLE ) , 0 ); 52 hal_remote_sw( XPTR( nic_cxy , nic_ptr + NIC_GLOBAL_SPAN + NIC_G_RUN ) , 0 ); 53 53 54 54 // allocate memory for chbuf descriptor (one page) -
trunk/hal/tsar_mips32/drivers/soclib_pic.c
r424 r432 96 96 97 97 // read PRIO register 98 uint32_t prio = base[(XCU_PRIO << 5) | lid]; 98 // in TSAR : XCU output [4*lid] is connected to core [lid] 99 uint32_t prio = base[ (XCU_PRIO << 5) | (lid<<2) ]; 99 100 100 101 *wti_status = (prio & 0x4) ? (((prio >> 24) & 0x1F) + 1) : 0; … … 129 130 &pti_status ); 130 131 131 irq_dmsg("\n[DBG] %s : core[%x,%d] enter / WTI = %x / HWI = %x / WTI = %x\n",132 irq_dmsg("\n[DBG] %s : core[%x,%d] enter / WTI = %x / HWI = %x / PTI = %x\n", 132 133 __FUNCTION__ , local_cxy , core->lid , wti_status , hwi_status , pti_status ); 133 134 … … 447 448 { 448 449 // enable this HWI in remote XCU controller 450 // in TSAR : XCU output [4*lid] is connected to core [lid] 449 451 hal_remote_sw( XPTR( src_chdev_cxy , 450 &seg_xcu_ptr[ (XCU_MSK_HWI_ENABLE << 5) | lid] ) , (1 << irq_id) );452 &seg_xcu_ptr[ (XCU_MSK_HWI_ENABLE << 5) | (lid<<4) ] ) , (1 << irq_id) ); 451 453 } 452 454 else if( irq_type == SOCLIB_TYPE_WTI ) 453 455 { 454 456 // enable this WTI in remote XCU controller 457 // in TSAR : XCU output [4*lid] is connected to core [lid] 455 458 hal_remote_sw( XPTR( src_chdev_cxy , 456 &seg_xcu_ptr[ (XCU_MSK_WTI_ENABLE << 5) | lid] ) , (1 << irq_id) );459 &seg_xcu_ptr[ (XCU_MSK_WTI_ENABLE << 5) | (lid<<4) ] ) , (1 << irq_id) ); 457 460 } 458 461 else … … 479 482 if( irq_type == SOCLIB_TYPE_HWI ) 480 483 { 481 // enable this HWI in remote XCU controller 484 // enable this HWI in remote XCU controller 485 // in TSAR : XCU output [4*lid] is connected to core [lid] 482 486 hal_remote_sw( XPTR( src_chdev_cxy , 483 &seg_xcu_ptr[(XCU_MSK_HWI_DISABLE << 5) | lid] ) , (1 << irq_id) );487 &seg_xcu_ptr[(XCU_MSK_HWI_DISABLE << 5) | (lid<<2) ] ) , (1 << irq_id) ); 484 488 } 485 489 else if( irq_type == SOCLIB_TYPE_WTI ) 486 490 { 487 491 // enable this WTI in remote XCU controller 492 // in TSAR : XCU output [4*lid] is connected to core [lid] 488 493 hal_remote_sw( XPTR( src_chdev_cxy , 489 &seg_xcu_ptr[(XCU_MSK_WTI_DISABLE << 5) | lid] ) , (1 << irq_id) );494 &seg_xcu_ptr[(XCU_MSK_WTI_DISABLE << 5) | (lid<<4) ] ) , (1 << irq_id) ); 490 495 } 491 496 else … … 509 514 510 515 // enable PTI in local XCU controller 511 base[(XCU_MSK_PTI_ENABLE << 5) | lid] = 1 << lid; 516 // In TSAR : XCU output [4*lid] is connected to core [lid] 517 base[ (XCU_MSK_PTI_ENABLE << 5) | (lid<<2) ] = 1 << lid; 512 518 } 513 519 … … 522 528 523 529 // enable WTI in local XCU controller 524 base[(XCU_MSK_WTI_ENABLE << 5) | lid] = 1 << lid; 530 // In TSAR : XCU output [4*lid] is connected to core [lid] 531 base[ (XCU_MSK_WTI_ENABLE << 5) | (lid<<2) ] = 1 << lid; 525 532 } 526 533 … … 533 540 534 541 // write to WTI mailbox[cxy][lid] 535 hal_remote_sw( XPTR( cxy , &base[(XCU_WTI_REG << 5) | lid ] ) , 0 );542 hal_remote_sw( XPTR( cxy , &base[(XCU_WTI_REG << 5) | lid ] ) , 0 ); 536 543 } 537 544 … … 546 553 547 554 // acknowlege IPI 548 uint32_t ack = base[ (XCU_WTI_REG << 5) | lid];555 uint32_t ack = base[ (XCU_WTI_REG << 5) | lid ]; 549 556 550 557 // we must make a fake use for ack value to avoid a warning -
trunk/hal/tsar_mips32/drivers/soclib_pic.h
r407 r432 137 137 typedef struct soclib_pic_core_s 138 138 { 139 struct chdev_s * hwi_vector[SOCLIB_MAX_HWI]; 140 struct chdev_s * wti_vector[SOCLIB_MAX_WTI]; 139 struct chdev_s * hwi_vector[SOCLIB_MAX_HWI]; /* HWI interrupt vector */ 140 struct chdev_s * wti_vector[SOCLIB_MAX_WTI]; /* WTI interrupt vector */ 141 141 } 142 142 soclib_pic_core_t; -
trunk/hal/tsar_mips32/drivers/soclib_tty.c
r424 r432 72 72 #endif 73 73 74 txt_dmsg("\n[DBG] %s : core[%x,%d] / DEV thread enter / cycle %d\n", 75 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , hal_time_stamp() ); 74 #if CONFIG_DEBUG_HAL_TXT 75 uint32_t cycle = (uint32_t)hal_get_cycles(); 76 if (CONFIG_DEBUG_HAL_TXT < cycle ) 77 printk("\n[DBG] %s : thread %x enter / cycle %d\n", 78 __FUNCTION__ , CURRENT_THREAD , cycle ); 79 #endif 76 80 77 81 // get client thread cluster and local pointer … … 108 112 hal_remote_sw( reg_xp , 1 ); 109 113 110 txt_dmsg("\n[DBG] %s : core[%x,%d] DEV thread deschedule / cycle %d\n", 111 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , hal_time_stamp() ); 114 #if CONFIG_DEBUG_HAL_TXT 115 cycle = (uint32_t)hal_get_cycles(); 116 if (CONFIG_DEBUG_HAL_TXT < cycle ) 117 printk("\n[DBG] %s : thread %x deschedule / cycle %d\n", 118 __FUNCTION__ , CURRENT_THREAD , cycle ); 119 #endif 112 120 113 121 // Block and deschedule server thread … … 115 123 sched_yield("blocked on ISR"); 116 124 117 txt_dmsg("\n[DBG] %s : core[%x,%d] / DEV thread resume / cycle %d\n", 118 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , hal_time_stamp() ); 125 #if CONFIG_DEBUG_HAL_TXT 126 cycle = (uint32_t)hal_get_cycles(); 127 if (CONFIG_DEBUG_HAL_TXT < cycle ) 128 printk("\n[DBG] %s : thread %x resume / cycle %d\n", 129 __FUNCTION__ , CURRENT_THREAD , cycle ); 130 #endif 119 131 120 132 #if CONFIG_READ_DEBUG … … 184 196 #endif 185 197 198 #if CONFIG_DEBUG_HAL_TXT 199 uint32_t cycle = (uint32_t)hal_get_cycles(); 200 if (CONFIG_DEBUG_HAL_TXT < cycle) 201 printk("\n[DBG] %s : enter / cycle %d\n", __FUNCTION__ , cycle ); 202 #endif 203 186 204 // get extended pointer on client thread 187 205 xptr_t root = XPTR( local_cxy , &chdev->wait_root ); … … 197 215 buf_xp = hal_remote_lwd( XPTR( client_cxy , &client_ptr->txt_cmd.buf_xp ) ); 198 216 199 txt_dmsg("\n[DBG] %s : core[%x,%d] enter / cycle %d\n",200 __FUNCTION__ , local_cxy, CURRENT_THREAD->core->lid , hal_time_stamp() );201 202 217 // get SOCLIB_TTY peripheral cluster and local pointer 203 218 cxy_t tty_cxy = GET_CXY( chdev->base ); … … 234 249 hal_remote_sw( reg_xp , 0 ); 235 250 } 236 else if( type == TXT_WRITE )// write all characters in string251 else // type == TXT_WRITE // write all characters in string 237 252 { 238 253 // loop on characters … … 276 291 hal_fence(); 277 292 278 txt_dmsg("\n[DBG] %s : core[%x,%d] exit / cycle %d\n", 279 __FUNCTION__ , local_cxy , CURRENT_THREAD->core->lid , hal_time_stamp() ); 293 #if CONFIG_DEBUG_HAL_TXT 294 cycle = (uint32_t)hal_get_cycles(); 295 if (CONFIG_DEBUG_HAL_TXT < cycle) 296 { 297 if( type == TXT_READ) 298 printk("\n[DBG] %s : exit after RX / cycle %d\n", __FUNCTION__ , cycle ); 299 else 300 printk("\n[DBG] %s : exit after TX / cycle %d\n", __FUNCTION__ , cycle ); 301 } 302 #endif 280 303 281 304 #if (CONFIG_READ_DEBUG & 0x1) || (CONFIG_WRITE_DEBUG & 0x1)
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