Changeset 443 for trunk/hal/tsar_mips32/core
- Timestamp:
- May 16, 2018, 4:15:22 PM (7 years ago)
- Location:
- trunk/hal/tsar_mips32/core
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/tsar_mips32/core/hal_gpt.c
r440 r443 132 132 xptr_t page_xp; 133 133 134 #if DEBUG_ GPT_ACCESS134 #if DEBUG_HAL_GPT_CREATE 135 135 uint32_t cycle = (uint32_t)hal_get_cycles; 136 if( DEBUG_ GPT_ACCESS< cycle )136 if( DEBUG_HAL_GPT_CREATE < cycle ) 137 137 printk("\n[DBG] %s : thread %x enter / cycle %d\n", 138 138 __FUNCTION__, CURRENT_THREAD, cycle ); … … 161 161 gpt->ppn = ppm_page2ppn( page_xp ); 162 162 163 #if DEBUG_ GPT_ACCESS163 #if DEBUG_HAL_GPT_CREATE 164 164 cycle = (uint32_t)hal_get_cycles; 165 if( DEBUG_ GPT_ACCESS< cycle )165 if( DEBUG_HAL_GPT_CREATE < cycle ) 166 166 printk("\n[DBG] %s : thread %x exit / cycle %d\n", 167 167 __FUNCTION__, CURRENT_THREAD, cycle ); … … 186 186 kmem_req_t req; 187 187 bool_t is_ref; 188 189 #if DEBUG_HAL_GPT_DESTROY 190 uint32_t cycle = (uint32_t)hal_get_cycles; 191 if( DEBUG_HAL_GPT_DESTROY < cycle ) 192 printk("\n[DBG] %s : thread %x enter / cycle %d\n", 193 __FUNCTION__, CURRENT_THREAD, cycle ); 194 #endif 188 195 189 196 // get pointer on calling process … … 252 259 req.ptr = GET_PTR( ppm_base2page( XPTR(local_cxy , pt1 ) ) ); 253 260 kmem_free( &req ); 261 262 #if DEBUG_HAL_GPT_DESTROY 263 cycle = (uint32_t)hal_get_cycles; 264 if( DEBUG_HAL_GPT_DESTROY < cycle ) 265 printk("\n[DBG] %s : thread %x exit / cycle %d\n", 266 __FUNCTION__, CURRENT_THREAD, cycle ); 267 #endif 254 268 255 269 } // end hal_gpt_destroy() … … 340 354 uint32_t tsar_attr; // PTE attributes for TSAR MMU 341 355 342 #if DEBUG_ GPT_ACCESS356 #if DEBUG_HAL_GPT_ACCESS 343 357 uint32_t cycle = (uint32_t)hal_get_cycles; 344 if( DEBUG_ GPT_ACCESS < cycle )358 if( DEBUG_HAL_GPT_ACCESS < cycle ) 345 359 printk("\n[DBG] %s : thread %x enter / vpn %x / attr %x / ppn %x / cycle %d\n", 346 360 __FUNCTION__, CURRENT_THREAD, vpn, attr, ppn, cycle ); … … 357 371 tsar_attr = gpt2tsar( attr ); 358 372 359 #if (DEBUG_ GPT_ACCESS & 1)360 if( DEBUG_ GPT_ACCESS < cycle )373 #if (DEBUG_HAL_GPT_ACCESS & 1) 374 if( DEBUG_HAL_GPT_ACCESS < cycle ) 361 375 printk("\n[DBG] %s : thread %x / vpn %x / &pt1 %x / tsar_attr %x\n", 362 376 __FUNCTION__, CURRENT_THREAD, vpn, pt1, tsar_attr ); … … 392 406 pte1 = *pte1_ptr; 393 407 394 #if (DEBUG_ GPT_ACCESS & 1)395 if( DEBUG_ GPT_ACCESS < cycle )408 #if (DEBUG_HAL_GPT_ACCESS & 1) 409 if( DEBUG_HAL_GPT_ACCESS < cycle ) 396 410 printk("\n[DBG] %s : thread %x / vpn %x / current_pte1 %x\n", 397 411 __FUNCTION__, CURRENT_THREAD, vpn, pte1 ); … … 437 451 pt2 = (uint32_t *)GET_PTR( ppm_ppn2base( pt2_ppn ) ); 438 452 439 #if (DEBUG_ GPT_ACCESS & 1)440 if( DEBUG_ GPT_ACCESS < cycle )453 #if (DEBUG_HAL_GPT_ACCESS & 1) 454 if( DEBUG_HAL_GPT_ACCESS < cycle ) 441 455 printk("\n[DBG] %s : thread %x / vpn %x / pte1 %x / &pt2 %x\n", 442 456 __FUNCTION__, CURRENT_THREAD, vpn, pte1, pt2 ); … … 452 466 hal_fence(); 453 467 454 #if DEBUG_ GPT_ACCESS468 #if DEBUG_HAL_GPT_ACCESS 455 469 cycle = (uint32_t)hal_get_cycles; 456 if( DEBUG_ GPT_ACCESS < cycle )470 if( DEBUG_HAL_GPT_ACCESS < cycle ) 457 471 printk("\n[DBG] %s : thread %x exit / vpn %x / pte2_attr %x / pte2_ppn %x / cycle %d\n", 458 472 __FUNCTION__, CURRENT_THREAD, vpn, pt2[2 * ix2], pt2[2 * ix2 + 1], cycle ); … … 762 776 ppn_t dst_pt2_ppn; 763 777 764 #if DEBUG_ GPT_ACCESS778 #if DEBUG_HAL_GPT_ACCESS 765 779 uint32_t cycle = (uint32_t)hal_get_cycles; 766 if( DEBUG_ GPT_ACCESS < cycle )780 if( DEBUG_HAL_GPT_ACCESS < cycle ) 767 781 printk("\n[DBG] %s : thread %x enter / vpn %x / cycle %d\n", 768 782 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); … … 853 867 *ppn = src_pte2_ppn; 854 868 855 #if DEBUG_ GPT_ACCESS869 #if DEBUG_HAL_GPT_ACCESS 856 870 cycle = (uint32_t)hal_get_cycles; 857 if( DEBUG_ GPT_ACCESS < cycle )871 if( DEBUG_HAL_GPT_ACCESS < cycle ) 858 872 printk("\n[DBG] %s : thread %x exit / copy done for vpn %x / cycle %d\n", 859 873 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); … … 870 884 *ppn = 0; 871 885 872 #if DEBUG_ GPT_ACCESS886 #if DEBUG_HAL_GPT_ACCESS 873 887 cycle = (uint32_t)hal_get_cycles; 874 if( DEBUG_ GPT_ACCESS < cycle )888 if( DEBUG_HAL_GPT_ACCESS < cycle ) 875 889 printk("\n[DBG] %s : thread %x exit / nothing done for vpn %x / cycle %d\n", 876 890 __FUNCTION__, CURRENT_THREAD, vpn, cycle ); -
trunk/hal/tsar_mips32/core/hal_ppm.c
r432 r443 101 101 } 102 102 103 // printk("\n@@@ in %s : reserved = %d / total = %d\n", __FUNCTION__, reserved_pages, pages_nr );104 105 103 // - set PG_RESERVED flag for reserved pages (kernel code & pages_tbl[]) 106 104 // - release all other pages to populate the free lists … … 115 113 // TODO optimisation : decompose this enormous set of small pages 116 114 // to several sets of big pages with various order values [AG] 117 118 // if( (i < (reserved_pages+10)) || (i > (pages_nr-5)) ) ppm_print();119 120 115 } 121 116 122 // assert( false , __FUNCTION__ , "PMM init completed\n");123 124 117 // check consistency 125 118 return ppm_assert_order( ppm );
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