Changeset 45 for trunk/hal/x86_64

Timestamp:

Jun 23, 2017, 11:55:08 AM (8 years ago)

Author:

max@…

Message:

Add some code for LAPIC; far from complete, but a good start.

Location:

trunk/hal/x86_64

Files:

• hal_acpi.c (modified) (1 diff)
• hal_gpt.c (modified) (2 diffs)
• hal_init.c (modified) (3 diffs)
• hal_internal.h (modified) (1 diff)
• hal_kentry.S (modified) (4 diffs)
• hal_lapic.c (added)
• hal_lapic.h (added)
• hal_segmentation.h (modified) (1 diff)

trunk/hal/x86_64/hal_acpi.c

@@ -111 +111 @@
 static void hal_acpi_parse_madt(madt_t *madt)
 {
-        paddr_t lapic_pa = (paddr_t)madt->Address;
+        extern paddr_t lapic_pa;
+        lapic_pa = (paddr_t)madt->Address;
         x86_printf("-> LAPIC address: %Z\n", lapic_pa);
 }

trunk/hal/x86_64/hal_gpt.c

@@ -65 +65 @@
 }
 
+/*
+ * Reset the bootstrap VA we've used in cluster0 so far. After this
+ * function, cluster0's heap is empty.
+ */
+void hal_gpt_bootstrap_reset()
+{
+        size_t npages = (va_avail - CLUSTER_HEAP_MIN_VA(0)) / PAGE_SIZE;
+        hal_gpt_leave_range(CLUSTER_HEAP_MIN_VA(0), npages);
+}
+
+
 void hal_gpt_enter(vaddr_t va, paddr_t pa)
 {
-        XASSERT((va % PAGE_SIZE == 0));
-        XASSERT((pa % PAGE_SIZE == 0));
+        XASSERT(va % PAGE_SIZE == 0);
+        XASSERT(pa % PAGE_SIZE == 0);
+        XASSERT(va == tmpva || PTE_BASE[pl1_i(va)] == 0);
         PTE_BASE[pl1_i(va)] = (pa & PG_FRAME) | PG_V | PG_KW | PG_NX;
 }
@@ -77 +89 @@
         for (i = 0; i < n; i++) {
                 hal_gpt_enter(va + i * PAGE_SIZE, pa + i * PAGE_SIZE);
+                invlpg(va + i * PAGE_SIZE);
+        }
+}
+
+void hal_gpt_leave(vaddr_t va)
+{
+        XASSERT(va % PAGE_SIZE == 0);
+        XASSERT(PTE_BASE[pl1_i(va)] != 0);
+        PTE_BASE[pl1_i(va)] = 0;
+}
+
+void hal_gpt_leave_range(vaddr_t va, size_t n)
+{
+        size_t i;
+        for (i = 0; i < n; i++) {
+                hal_gpt_leave(va + i * PAGE_SIZE);
                 invlpg(va + i * PAGE_SIZE);
         }

trunk/hal/x86_64/hal_init.c

@@ -24 +24 @@
 #include <hal_multiboot.h>
 #include <hal_segmentation.h>
+#include <hal_acpi.h>
+#include <hal_lapic.h>
 #include <hal_internal.h>
 
@@ -98 +100 @@
         hal_acpi_init();
         x86_printf("[+] hal_acpi_init called\n");
+
+        hal_gpt_bootstrap_reset();
+        x86_printf("[+] hal_gpt_bootstrap_reset called\n");
+
+        hal_init_lapic();
+        x86_printf("[+] hal_init_lapic called\n");
 
         x86_printf("-> mytest = %z\n", mytest);
@@ -207 +215 @@
 static void idt_create()
 {
-        extern uint64_t x86_traps[];
+        extern uint64_t x86_traps[], x86_intrs[];
         struct idt_seg *idt;
         size_t i;
 
         idt = (struct idt_seg *)&idtstore;
-        for (i = 0; i < NCPUIDT; i++) {
-                idt_set_seg(&idt[i], (void *)x86_traps[i], 0, SDT_SYS386IGT,
-                    SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL));
+
+        /* General exceptions */
+        for (i = CPUVEC_MIN; i < CPUVEC_MAX; i++) {
+                idt_set_seg(&idt[i], (void *)x86_traps[i - CPUVEC_MIN], 0,
+                    SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL));
         }
+
+        /* LAPIC interrupts */
+        for (i = LAPICVEC_MIN; i < LAPICVEC_MAX; i++) {
+                idt_set_seg(&idt[i], (void *)x86_intrs[i - LAPICVEC_MIN], 0,
+                    SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL));
+        }
+
 }
 

trunk/hal/x86_64/hal_internal.h

@@ -34 +34 @@
 paddr_t hal_gpt_bootstrap_palloc(size_t npages);
 vaddr_t hal_gpt_bootstrap_valloc(size_t npages);
+void hal_gpt_bootstrap_reset();
 void hal_gpt_enter(vaddr_t va, paddr_t pa);
 void hal_gpt_enter_range(vaddr_t va, paddr_t pa, size_t n);
+void hal_gpt_leave(vaddr_t va);
+void hal_gpt_leave_range(vaddr_t va, size_t n);
 void hal_gpt_init(paddr_t firstpa);
 

trunk/hal/x86_64/hal_kentry.S

@@ -36 +36 @@
         .type   hal_trap_entry, @function
 
+        /*
+         * General exceptions.
+         */
 ASM_ENTRY(x86_trap00)
         ZTRAPENTRY(T_DIVIDE)
@@ -111 +114 @@
         ZTRAPENTRY(T_RESERVED)
 
+        /*
+         * LAPIC interrupts.
+         */
+ASM_ENTRY(x86_spurious)
+        ZTRAPENTRY(T_ASTFLT)
+
+
+
 /*
  * Arguments pushed on the stack:
@@ -128 +139 @@
         .data
         .globl  x86_traps
+        .globl  x86_intrs
         .type   x86_traps, @object
+        .type   x86_intrs, @object
 
         .align  64
@@ -149 +162 @@
         .quad   x86_trap1e, x86_trap1f
 
+x86_intrs:
+        .quad   x86_spurious
+

trunk/hal/x86_64/hal_segmentation.h

@@ -191 +191 @@
  * Entries in the Interrupt Descriptor Table (IDT)
  */
-#define NCPUIDT 32      /* reserved entries for CPU exceptions */
+#define CPUVEC_MIN      0
+#define CPUVEC_MAX      32      /* reserved entries for CPU exceptions */
+#define LAPICVEC_MIN    CPUVEC_MAX
+#define LAPICVEC_MAX    (LAPICVEC_MIN + 1)
+
 #define NIDT    256     /* total number of IDT entries */