Changeset 457 for trunk/hal/tsar_mips32


Ignore:
Timestamp:
Aug 2, 2018, 11:47:13 AM (6 years ago)
Author:
alain
Message:

This version modifies the exec syscall and fixes a large number of small bugs.
The version number has been updated (0.1)

Location:
trunk/hal/tsar_mips32
Files:
18 edited

Legend:

Unmodified
Added
Removed

  • trunk/hal/tsar_mips32/Makefile

    r444 r457  
    7272                                $(HAL_ARCH)/drivers/%.h      \
    7373                                $(KERNEL)/kernel_config.h    \
    74                                 $(HAL_ARCH)/core/hal_types.h
     74                                $(HAL_ARCH)/core/hal_kernel_types.h
    7575        $(CC) $(HAL_INCLUDE) $(CFLAGS)  -c -o $@ $<
    7676
    … …  
    8080                                $(HAL)/generic/%.h           \
    8181                                $(KERNEL)/kernel_config.h    \
    82                                 $(HAL_ARCH)/core/hal_types.h
     82                                $(HAL_ARCH)/core/hal_kernel_types.h
    8383        $(CC) $(HAL_INCLUDE) $(CFLAGS) -c -o $@ $<
    8484
    … …  
    8686                                      $(HAL_ARCH)/core/hal_kentry.h \
    8787                                      $(KERNEL)/kernel_config.h     \
    88                                       $(HAL_ARCH)/core/hal_types.h
     88                                      $(HAL_ARCH)/core/hal_kernel_types.h
    8989        $(CC) $(HAL_INCLUDE) $(CFLAGS) -c -o $@ $<
    9090

  • trunk/hal/tsar_mips32/core/hal_atomic.c

    r62 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525
    2626////////////////////////////////////

  • trunk/hal/tsar_mips32/core/hal_context.c

    r432 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <hal_switch.h>
    2626#include <memcpy.h>
    … …  
    136136}   // end hal_cpu_context_alloc()
    137137
    138 ///////////////////////////////////////////////////
    139 // The following context slots are initialised :
     138/////////////////////////////////////////////////
     139// The following context slots are initialised
    140140// GPR : a0_04 / sp_29 / ra_31
    141141// CP0 : c0_sr / c0_th / c0_epc
    142142// CP2 : c2_ptpr / c2_mode
    143 ///////////////////////////////////////////////////
    144 error_t hal_cpu_context_create( thread_t * thread )
    145 {
    146     // allocate memory for a CPU context
    147     error_t error = hal_cpu_context_alloc( thread );
    148 
    149     if( error ) return error;
    150 
     143/////////////////////////////////////////////////
     144void hal_cpu_context_init( thread_t * thread )
     145{
    151146    hal_cpu_context_t * context = (hal_cpu_context_t *)thread->cpu_context;
     147
     148    assert( (context != NULL ), __FUNCTION__, "CPU context not allocated" );
    152149
    153150    // initialisation depends on thread type
    … …  
    173170        context->c2_mode = 0x3;
    174171    }
    175 
    176     return 0;
    177 
    178 }  // end hal_cpu_context_create()
     172}  // end hal_cpu_context_init()
    179173
    180174////////////////////////////////////////////
    … …  
    243237        assert( (current == child_ptr) , __FUNCTION__ , "current = %x / child = %x\n");
    244238    }
    245 
    246239}  // end hal_cpu_context_fork()
     240
     241//////////////////////////////////////////////
     242void hal_cpu_context_exec( thread_t * thread )
     243{
     244    // re_initialize CPU context
     245    hal_cpu_context_init( thread );
     246
     247    // restore CPU registers ... and jump
     248    hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context );
     249
     250} // end hal_cpu_context_exec()
    247251
    248252/////////////////////////////////////////////////
    … …  
    312316
    313317}   // end hal_fpu_context_alloc()
     318
     319//////////////////////////////////////////////
     320void hal_fpu_context_init( thread_t * thread )
     321{
     322    hal_fpu_context_t * context = thread->fpu_context;
     323
     324    assert( (context != NULL) , __FUNCTION__ , "fpu context not allocated" );
     325
     326    memset( context , 0 , sizeof(hal_fpu_context_t) );
     327}
    314328
    315329//////////////////////////////////////////

  • trunk/hal/tsar_mips32/core/hal_drivers.c

    r407 r457  
    2020 */
    2121
    22 #include <hal_types.h>
     22#include <hal_kernel_types.h>
    2323#include <chdev.h>
    2424#include <hal_drivers.h>

  • trunk/hal/tsar_mips32/core/hal_exception.c

    r440 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <hal_irqmask.h>
    2626#include <hal_special.h>
    … …  
    134134        core_t   * core = this->core;
    135135
    136     // enable FPU
     136    // enable FPU (in core SR)
    137137        hal_fpu_enable();
    138138
    139     // save FPU context in current owner thread if required
     139    // save FPU register values in current owner thread if required
    140140        if( core->fpu_owner != NULL )
    141141    {
    142142        if( core->fpu_owner != this )
    143143            {
     144            // save the FPU registers to current owner thread context
    144145                    hal_fpu_context_save( XPTR( local_cxy , core->fpu_owner ) );
     146
     147            // restore FPU registers from requesting thread context
     148                hal_fpu_context_restore( this->fpu_context );
     149
     150            // attach the FPU to the requesting thread
     151                core->fpu_owner = this;
    145152        }
    146153        }
    147 
    148     // attach the FPU to the requesting thread
    149         hal_fpu_context_restore( this->fpu_context );
    150         core->fpu_owner = this;
     154    else
     155    {
     156        // restore FPU registers from requesting thread context
     157            hal_fpu_context_restore( this->fpu_context );
     158
     159        // attach the FPU to the requesting thread
     160            core->fpu_owner = this;
     161    }
    151162
    152163        return EXCP_NON_FATAL;
    … …  
    206217uint32_t cycle = (uint32_t)hal_get_cycles();
    207218if( DEBUG_HAL_EXCEPTIONS < cycle )
    208 printk("\n[DBG] %s : thread %x enter / is_ins %d / %s / vaddr %x / cycle %d\n",
    209 __FUNCTION__, this, is_ins, hal_mmu_exception_str(excp_code), bad_vaddr, cycle );
     219printk("\n[DBG] %s : thread %x in process %x enter / is_ins %d / %s / vaddr %x / cycle %d\n",
     220__FUNCTION__, this->trdid, process->pid, is_ins, hal_mmu_exception_str(excp_code), bad_vaddr, cycle);
    210221#endif
    211222
    … …  
    235246cycle = (uint32_t)hal_get_cycles();
    236247if( DEBUG_HAL_EXCEPTIONS < cycle )
    237 printk("\n[DBG] %s : thread %x exit / page-fault handled for vaddr = %x\n",
    238 __FUNCTION__ , this , bad_vaddr );
     248printk("\n[DBG] %s : thread %x in process %x exit / page-fault handled for vaddr = %x\n",
     249__FUNCTION__, this->trdid, process->pid, bad_vaddr );
    239250#endif
    240251 
    … …  
    275286cycle = (uint32_t)hal_get_cycles();
    276287if( DEBUG_HAL_EXCEPTIONS < cycle )
    277 printk("\n[DBG] %s : thread %x exit / copy-on-write handled for vaddr = %x\n",
    278 __FUNCTION__ , this , bad_vaddr );
     288printk("\n[DBG] %s : thread %x in process %x exit / copy-on-write handled for vaddr = %x\n",
     289__FUNCTION__, this->trdid, process->pid, bad_vaddr );
    279290#endif
    280291
    … …  
    300311        {
    301312            assert( false , __FUNCTION__ ,
    302             "thread %x / core[%x,%d] / epc %x / vaddr %x / cycle %d\n",
    303             this, local_cxy, this->core->lid, excPC, bad_vaddr, (uint32_t)hal_get_cycles() );
     313            "thread %x in process %x / core[%x,%d] / epc %x / vaddr %x / cycle %d\n",
     314            this->trdid, this->process->pid, local_cxy, this->core->lid,
     315            excPC, bad_vaddr, (uint32_t)hal_get_cycles() );
    304316
    305317            return EXCP_KERNEL_PANIC;
    … …  
    398410uint32_t cycle = (uint32_t)hal_get_cycles();
    399411if( DEBUG_HAL_EXCEPTIONS < cycle )
    400 printk("\n[DBG] %s : thread %x enter / core[%x,%d] / pid %x / epc %x / xcode %x / cycle %d\n",
    401 __FUNCTION__, this, local_cxy, this->core->lid, this->process->pid, excPC, excCode, cycle );
     412printk("\n[DBG] %s : thread %x in process %x enter / core[%x,%d] / epc %x / xcode %x / cycle %d\n",
     413__FUNCTION__, this->trdid, this->process->pid, local_cxy, this->core->lid, excPC, excCode, cycle );
    402414#endif
    403415
    … …  
    458470cycle = (uint32_t)hal_get_cycles();
    459471if( DEBUG_HAL_EXCEPTIONS < cycle )
    460 printk("\n[DBG] %s : thread %x exit / core[%x,%d] / pid %x / epc %x / xcode %x / cycle %d\n",
    461 __FUNCTION__, this, local_cxy, this->core->lid, this->process->pid, excPC, excCode, cycle );
     472printk("\n[DBG] %s : thread %x in process %x exit / core[%x,%d] / epc %x / xcode %x / cycle %d\n",
     473__FUNCTION__, this->trdid, this->process->pid, local_cxy, this->core->lid, excPC, excCode, cycle );
    462474#endif
    463475

  • trunk/hal/tsar_mips32/core/hal_gpt.c

    r445 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <hal_gpt.h>
    2626#include <hal_special.h>

  • trunk/hal/tsar_mips32/core/hal_interrupt.c

    r435 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <hal_special.h>
    2626#include <kernel_config.h>

  • trunk/hal/tsar_mips32/core/hal_irqmask.c

    r285 r457  
    2323 */
    2424
    25 #include <hal_types.h>
     25#include <hal_kernel_types.h>
     26#include <hal_shared_types.h>
    2627
    2728//////////////////////////////////////////

  • trunk/hal/tsar_mips32/core/hal_ppm.c

    r443 r457  
    2323
    2424#include <kernel_config.h>
    25 #include <hal_types.h>
     25#include <hal_kernel_types.h>
    2626#include <hal_ppm.h>
    2727#include <hal_special.h>

  • trunk/hal/tsar_mips32/core/hal_remote.c

    r313 r457  
    2323 */
    2424
    25 #include <hal_types.h>
     25#include <hal_kernel_types.h>
    2626#include <hal_irqmask.h>
    2727

  • trunk/hal/tsar_mips32/core/hal_special.c

    r425 r457  
    2323
    2424
    25 #include <hal_types.h>
     25#include <hal_kernel_types.h>
    2626#include <hal_special.h>
    2727#include <core.h>

  • trunk/hal/tsar_mips32/core/hal_switch.S

    r408 r457  
    2626    .global  hal_do_cpu_switch
    2727    .global  hal_do_cpu_save
     28    .global  hal_do_cpu_restore
    2829
    2930    .set     noat
    … …  
    9091        sw      $27,  33*4($26)           /* save c2_mode to slot 33 */
    9192
     93    sync                           
     94
    9295    /* restore new thread context */
    9396 
    … …  
    144147        mtc2    $27,  $1                   /* restore c2_mode from slot 33 */
    145148    mtc0        $26,  $12                  /* restore c0_sr from slot 34 */
    146 
    147     sync                           
    148149
    149150    jr      $31                        /* return to caller */
    … …  
    211212    nop
    212213
     214#---------------------------------------------------------------------------------
     215# The hal_do_cpu_restore()function makes the following assumption:
     216# - register $4 contains a pointer on the target thread context.
     217#---------------------------------------------------------------------------------
     218hal_do_cpu_restore:
     219
     220    move    $26,  $4                  /* $26 <= &context */
     221
     222    lw      $27,   0*4($26)         
     223    mtc0    $27,   $14                 /* restore C0_epc from slot 0 */
     224
     225    lw      $1,    1*4($26)         
     226    lw      $2,    2*4($26)         
     227    lw      $3,    3*4($26)         
     228    lw      $4,    4*4($26)         
     229    lw      $5,    5*4($26)         
     230    lw      $6,    6*4($26)         
     231    lw      $7,    7*4($26)         
     232    lw      $8,    8*4($26)         
     233    lw      $9,    9*4($26)         
     234    lw      $10,  10*4($26)         
     235    lw      $11,  11*4($26)         
     236    lw      $12,  12*4($26)         
     237    lw      $13,  13*4($26)         
     238    lw      $14,  14*4($26)         
     239    lw      $15,  15*4($26)         
     240        lw      $16,  16*4($26)         
     241        lw      $17,  17*4($26)         
     242    lw      $18,  18*4($26)         
     243    lw      $19,  19*4($26)         
     244    lw      $20,  20*4($26)         
     245    lw      $21,  21*4($26)         
     246    lw      $22,  22*4($26)         
     247    lw      $23,  23*4($26)         
     248    lw      $24,  24*4($26)         
     249    lw      $25,  25*4($26)         
     250
     251    lw      $27,  26*4($26)         
     252    mthi    $27                        /* restore hi from slot 26 */
     253    lw      $27,  27*4($26)         
     254    mtlo    $27                        /* restore lo from slot 27 */
     255
     256        lw      $28,  28*4($26)         
     257        lw      $29,  29*4($26)         
     258        lw      $30,  30*4($26)         
     259        lw      $31,  31*4($26)            /* restore ra from slot 31 */
     260
     261        lw      $27,  32*4($26)
     262        mtc2    $27,  $0                   /* restore c2_ptpr from slot 32 */
     263
     264        lw      $27,  35*4($26)     
     265    mtc0        $27,  $4, 2                /* restore c0_th from slot 35 */
     266
     267        lw      $27,  33*4($26)
     268        lw      $26,  34*4($26)
     269
     270        mtc2    $27,  $1                   /* restore c2_mode from slot 33 */
     271    mtc0        $26,  $12                  /* restore c0_sr from slot 34 */
     272
     273    jr      $31                        /* return to caller */
     274    nop
     275
    213276        .set reorder                   
    214277    .set at                         

  • trunk/hal/tsar_mips32/core/hal_syscall.c

    r425 r457  
    2222 */
    2323
    24 #include <hal_types.h>
     24#include <hal_kernel_types.h>
    2525#include <hal_syscall.h>
    2626#include <do_syscall.h>
    … …  
    4848    enter_uzone = (uint32_t *)this->uzone_current;
    4949
    50 //printk("\n@@@ enter %s : thread = %x / enter_uzone = %x / EPC = %x\n",
    51 //__FUNCTION__ , this , enter_uzone , enter_uzone[UZ_EPC] );
    52 
    5350    // get syscall arguments from uzone
    5451        service_num = enter_uzone[UZ_V0];
    … …  
    7168    exit_uzone = (uint32_t *)this->uzone_current;
    7269
    73 //printk("\n@@@ exit %s : thread = %x / exit_uzone = %x / EPC = %x\n",
    74 //__FUNCTION__ , this , exit_uzone , exit_uzone[UZ_EPC] );
    75 
    7670    // set return value to uzone
    7771        exit_uzone[UZ_V0] = retval;

  • trunk/hal/tsar_mips32/core/hal_uspace.c

    r425 r457  
    2525#include <errno.h>
    2626#include <vmm.h>
    27 #include <hal_types.h>
     27#include <hal_kernel_types.h>
    2828#include <hal_uspace.h>
    2929#include <hal_irqmask.h>

  • trunk/hal/tsar_mips32/core/hal_vmm.c

    r411 r457  
    2323
    2424#include <kernel_config.h>
    25 #include <hal_types.h>
     25#include <hal_kernel_types.h>
    2626#include <hal_vmm.h>
    2727#include <hal_gpt.h>

  • trunk/hal/tsar_mips32/drivers/soclib_pic.c

    r451 r457  
    137137#endif
    138138
    139     // analyse status and handle up to 3 pending IRQ (one WTI, one HWI, one PTI)
     139    // analyse status and handle up to 3 pending IRQs (one WTI, one HWI, one PTI)
    140140
    141141    if( wti_status )          // pending WTI
    … …  
    150150#if DEBUG_HAL_IRQS
    151151if (DEBUG_HAL_IRQS < cycle )
    152 printk("\n[DBG] %s : core[%x,%d] received an IPI\n", __FUNCTION__ , local_cxy , core->lid );
     152printk("\n[DBG] %s : core[%x,%d] handling IPI\n", __FUNCTION__ , local_cxy , core->lid );
    153153#endif
    154154            // acknowledge IRQ (this require an XCU read)
    … …  
    156156
    157157            // check RPC FIFO,  and activate or create a RPC thread
    158             // condition is always true, but we must use the ack value
     158            // condition is always true, but we use the ack value
     159            // to avoid a GCC warning
    159160            if( ack + 1 ) rpc_check();
    160161        }
    … …  
    182183#if DEBUG_HAL_IRQS
    183184if (DEBUG_HAL_IRQS < cycle )
    184 printk("\n[DBG] %s : core[%x,%d] received external WTI %d\n",
     185printk("\n[DBG] %s : core[%x,%d] handling external WTI %d\n",
    185186__FUNCTION__ , local_cxy , core->lid , index );
    186187#endif
    … …  
    216217#if DEBUG_HAL_IRQS
    217218if (DEBUG_HAL_IRQS < cycle )
    218 printk("\n[DBG] %s : core[%x,%d] received HWI %d\n",
     219printk("\n[DBG] %s : core[%x,%d] handling HWI %d\n",
    219220__FUNCTION__ , local_cxy , core->lid , index );
    220221#endif
    … …  
    232233#if DEBUG_HAL_IRQS
    233234if (DEBUG_HAL_IRQS < cycle )
    234 printk("\n[DBG] %s : core[%x,%d] received PTI %d\n",
     235printk("\n[DBG] %s : core[%x,%d] handling PTI %d\n",
    235236__FUNCTION__ , core->lid , local_cxy , index );
    236237#endif
    … …  
    239240
    240241        // execute all actions related to TICK event
    241         // condition is always true, but we must use the ack value
     242        // condition is always true, but we use the ack value
     243        // to avoid a GCC warning
    242244        if( ack + 1 ) core_clock( core );
    243245        }
    … …  
    515517{
    516518    // calling core local index
    517     lid_t  lid = CURRENT_CORE->lid;
     519    lid_t  lid = CURRENT_THREAD->core->lid;
    518520
    519521    // get XCU segment base
    … …  
    533535{
    534536    // calling core local index
    535     lid_t  lid = CURRENT_CORE->lid;
     537    lid_t  lid = CURRENT_THREAD->core->lid;
    536538
    537539    // get XCU segment base

  • trunk/hal/tsar_mips32/drivers/soclib_tty.c

    r451 r457  
    272272    xptr_t       parent_main_xp;    // local pointer on parent process main thread
    273273
    274     // get TXT chdev channel, direction and server thread
     274    // get TXT chdev channel, direction, server thread, and server core
    275275    channel    = chdev->channel;
    276276    is_rx      = chdev->is_rx;
    … …  
    455455                thread_unblock( XPTR( local_cxy , server ) , THREAD_BLOCKED_ISR );
    456456
    457                 // send IPI to core running server thread
    458                 dev_pic_send_ipi( local_cxy , server_lid );
     457                // send IPI to core running server thread if required
     458                if( server_lid != CURRENT_THREAD->core->lid )
     459                {
     460                    dev_pic_send_ipi( local_cxy , server_lid );
     461                }
    459462            }
    460463            else
    … …  
    501504        thread_unblock( XPTR( local_cxy , server ) , THREAD_BLOCKED_ISR );
    502505
    503         // send IPI to core running server thread
    504         dev_pic_send_ipi( local_cxy , server_lid );
     506        // send IPI to core running server thread if required
     507        if( server_lid != CURRENT_THREAD->core->lid )
     508        {
     509            dev_pic_send_ipi( local_cxy , server_lid );
     510        }
    505511
    506512    }  // end TX

  • trunk/hal/tsar_mips32/drivers/soclib_tty.h

    r436 r457  
    22 * soclib_tty.c - soclib tty driver definition.
    33 *
    4  * Author  Alain Greiner (2016)
     4 * Author  Alain Greiner (2016,2017,2018)
    55 *
    66 * Copyright (c)  UPMC Sorbonne Universites
    … …  
    2929/****************************************************************************************
    3030 * This driver supports the vci_tty_tsar component.
    31  * It implements the generic TXT device API:
     31 * Regarding read/write request, it implements the generic TXT device API:
    3232 * - transfer one single character from TTY to command "buffer" if to_mem is non-zero.
    3333 * - transfer "count" characters from command "buffer" to TTY if "to_mem is zero.
     34 * It handles asynchronous control characters (^C / ^Z), that are translated to signals
     35 * transmited to the TXT owner process (foreground process).
    3436 ***************************************************************************************/
    3537
    … …  
    101103/****************************************************************************************
    102104 * This ISR is executed to handle both the TTY_TX_IRQ and the TTY_RX_IRQ, even if
    103  *   The RX_IRQ is activated as soon as the TTY_STATUS_RX_FULL bit is 1 in the
     105 * there is two different channel devices for TX and RX transfers.
     106 *
     107 * As the <chdev> argument is a local pointer, this ISR is always executed by a core
     108 * that is in the same cluster as the core running the DEV server thread.
     109 *
     110 * - The RX_IRQ is activated as soon as the TTY_STATUS_RX_FULL bit is 1 in the
    104111 *   TTY_STATUS register, when the TTY_RX_IRQ_ENABLE is non zero, indicating that
    105112 *   the TTY_READ buffer is full and can be read.
    106  *   The TX_IRQ is activated as soon as the TTY_STATUS_TX_FULL bit is 0 in the
     113 * - The TX_IRQ is activated as soon as the TTY_STATUS_TX_FULL bit is 0 in the
    107114 *   TTY_STATUS register, when the TTY_TX_IRQ_ENABLE is non zero, indicating that
    108115 *   the TTY_WRITE buffer is empty, and can be written.
    109  * WARNING : In ALMOS-MKH, the RX_IRQ is always enabled to catch the control signals,
     116 *
     117 * The RX_IRQ is always enabled to catch the control characters (^Z / ^C),
    110118 * but the TX_IRQ is dynamically enabled by the TXT_WRITE command, and disabled when
    111119 * the command is completed.
    112120 *
    113  * 1) The ISR first read the TTY_STATUS to get the current state of the TTY_READ and
    114  *   the TTY_WRITE buffers.
     121 * For normal characters The ISR uses two private TTY_RX and TTY_TX software FIFOs
     122 * (two FIFOs per channel) to communicates with the DEV server thread executing the
     123 * soclib_tty_cmd() function.
     124
     125 * For an RX transfer, this ISR executes a while loop moving bytes until the source
     126 * TTY_READ buffer is empty:
     127 *   1) The ISR read one byte from the TTY_READ register and acknowledge the RX_IRQ.
     128 *   2) if the byte is a ^Z character, it uses a multicast RPC to block all treads of
     129 *      the TXT owner process, and transfer TXT ownership to another process of the group.
     130 *   3) if the byte is a ^C character, it removes the process from the TXT group, and send
     131 *      a multicast RPC to delete all threads of the TXT owner process.
     132 *   4) if the byte is a normal character and the destination TTY_RX_FIFO is not full,
     133 *      it writes the byte to this FIFO, unblock the TXT_RX server thread, and send an IPI
     134 *      to this server thread (only if it is running on another core than the ISR).
     135 *   5) It discards the byte if the TTY_RX_FIFO is full, with a warning message on TXT0.
    115136 *
    116  * 2) It try to read the first command registered in the server thread queue associated
    117  *    to the TTY channel
    118  *
    119  * 2) The ISR handles the RX when the TTY_READ buffer is full :
    120  *   . it read the available character from the TTY_READ buffer, and this
    121  *     acknowledges the RX_IRQ.
    122  *   . if it is a control character ( ^C / ^D / ^Z ) it translate it to the proper
    123  *     signal and execute the relevant sigaction for the foreground process.
    124  *   . if it is a normal character, it try to get the first command registered in the
    125  *     server thread queue. If it is a TXT_READ, it returns this character to the
    126  *     command buffer in the client thread.
    127  *
    128  * 3) The ISR handles the TX when the TTY_WRITE buffer is empty and a TXT_WRITE
    129  *   . it try to get it copies the
    130  *     character to the command buffer, acknowledges the TTY_RX_IRQ, and unblock the
    131  *     associated server thread.
    132      
    133  *   . the control characters ^C / ^D / ^Z  are directly handled by the ISR and
    134  *     translated to the foreground process.
    135 
    136  * - the
    137  the TXT_READ and TXT_WRITE commands.
    138  * It gets the command arguments from the first client thread in the TXT chdev queue:
    139  * - if TXT_READ, it transfers one byte from the TTY_READ_REG to the command buffer.
    140  *   It simply returns for retry if TTY_READ_REG is empty.
    141  * - if TXT_WRITE, it tries to transfer several bytes from the command buffer to the
    142  *   TTY_WRITE_REG. If the TTY_WRITE_REG is full, it updates the "count" and "buffer"
    143  *   command arguments and returns for retry.
    144  * When the I/O operation is completed, it sets the status field in the command, unblocks
    145  * the server thread, and unblocks the client thread.
     137 * For a TX transfer, this ISR executes a while loop moving bytes until the source
     138 * TTY_TX_FIFO is empty:
     139 *   1) if the destination TTY_WRITE register is not full, it moves the byte from the
     140 *      TTY_TX_FIFO to the TTY_WRITE register.
     141 *   2) if the TTY_WRITE register is full, it polls (busy waiting) the TTY_STATUS register,
     142 *      until the TTY_WRITE register is empty.
     143 *   3) when the source TTY_TX_FIFO is empty, this ISR disable the TTY_TX_IRQ, unblock
     144 *      the TXT_TX server thread, and send an IPI to this server thread (only if it is
     145 *      running on another core than the ISR).
    146146 ****************************************************************************************
    147147 * @ chdev     : local pointer on TXT chdev descriptor.
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