Changeset 482 for trunk/hal/x86_64/core
- Timestamp:
- Aug 21, 2018, 9:52:05 PM (6 years ago)
- Location:
- trunk/hal/x86_64/core
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/x86_64/core/hal_acpi.c
r457 r482 300 300 /* -------------------------------------------------------------------------- */ 301 301 302 void hal_acpi_init( )302 void hal_acpi_init( void ) 303 303 { 304 304 rsdp_t *rsdp; -
trunk/hal/x86_64/core/hal_acpi.h
r275 r482 58 58 */ 59 59 60 void hal_acpi_init( );60 void hal_acpi_init( void ); 61 61 62 62 #define ACPI_RSDP_ALIGN 16 -
trunk/hal/x86_64/core/hal_apic.c
r457 r482 104 104 105 105 uint64_t 106 hal_pit_timer_read( )106 hal_pit_timer_read( void ) 107 107 { 108 108 uint8_t lo, hi; … … 197 197 #define RS232_SCRATCH 0x07 198 198 199 static bool_t hal_com_received( )199 static bool_t hal_com_received( void ) 200 200 { 201 201 return (in8(RS232_COM1_BASE + RS232_LSR) & LSR_DR) != 0; 202 202 } 203 203 204 static bool_t hal_com_transmit_empty( )204 static bool_t hal_com_transmit_empty( void ) 205 205 { 206 206 return (in8(RS232_COM1_BASE + RS232_LSR) & LSR_TBE) != 0; 207 207 } 208 208 209 char hal_com_read( )209 char hal_com_read( void ) 210 210 { 211 211 while (!hal_com_received()); … … 228 228 * Called early to provide x86-specific messages. Interrupts disabled. 229 229 */ 230 void hal_com_init_early( )230 void hal_com_init_early( void ) 231 231 { 232 232 /* Disable all interrupts */ … … 246 246 } 247 247 248 static void hal_com_init( )248 static void hal_com_init( void ) 249 249 { 250 250 /* Disable all interrupts */ … … 337 337 } 338 338 339 static void hal_ioapic_init( )339 static void hal_ioapic_init( void ) 340 340 { 341 341 uint32_t ver; … … 374 374 } 375 375 376 uint32_t hal_lapic_gid( )376 uint32_t hal_lapic_gid( void ) 377 377 { 378 378 return hal_lapic_read(LAPIC_ID) >> LAPIC_ID_SHIFT; 379 379 } 380 380 381 static void hal_lapic_icr_wait( )381 static void hal_lapic_icr_wait( void ) 382 382 { 383 383 while ((hal_lapic_read(LAPIC_ICRLO) & LAPIC_DLSTAT_BUSY) != 0) { … … 390 390 * exact bus frequency. 391 391 */ 392 static void hal_lapic_calibrate( )392 static void hal_lapic_calibrate( void ) 393 393 { 394 394 uint64_t pittick, lapictick0, lapictick1; … … 442 442 * Only the Spurious and APIC Timer interrupts are enabled. 443 443 */ 444 void cpu_lapic_init( )444 void cpu_lapic_init( void ) 445 445 { 446 446 if ((rdmsr(MSR_APICBASE) & APICBASE_PHYSADDR) != lapic_pa) { … … 536 536 /* -------------------------------------------------------------------------- */ 537 537 538 void hal_apic_init( )538 void hal_apic_init( void ) 539 539 { 540 540 /* Disable the PIC */ -
trunk/hal/x86_64/core/hal_apic.h
r237 r482 21 21 22 22 #ifndef x86_ASM 23 char hal_com_read( );23 char hal_com_read( void ); 24 24 void hal_com_send(uint8_t chan, char c); 25 void hal_com_init_early( );25 void hal_com_init_early( void ); 26 26 27 27 void hal_ioapic_bind_irq(uint8_t irq, uint8_t vec, uint8_t dest); … … 32 32 void hal_ioapic_set_entry(uint8_t irq, uint8_t vec, uint8_t dest); 33 33 34 uint32_t hal_lapic_gid( );35 void cpu_lapic_init( );36 void hal_apic_init( );34 uint32_t hal_lapic_gid( void ); 35 void cpu_lapic_init( void ); 36 void hal_apic_init( void ); 37 37 38 38 int boot_cpuN(uint32_t gid, paddr_t pa); -
trunk/hal/x86_64/core/hal_gpt.c
r457 r482 61 61 * function, cluster0's heap is empty. 62 62 */ 63 void hal_gpt_bootstrap_reset( )63 void hal_gpt_bootstrap_reset( void ) 64 64 { 65 65 /* … … 78 78 * only call hal_gpt_bootstrap_valloc, without entering it in a PA. 79 79 */ 80 size_t hal_gpt_bootstrap_uniformize( )80 size_t hal_gpt_bootstrap_uniformize( void ) 81 81 { 82 82 size_t pa_offset = pa_avail - 0; -
trunk/hal/x86_64/core/hal_init.c
r457 r482 47 47 void kernel_init(boot_info_t *info); 48 48 49 static void gdt_create( );50 static void idt_create( );49 static void gdt_create( void ); 50 static void idt_create( void ); 51 51 void cpu_tls_init(size_t lid); 52 void cpu_identify( );52 void cpu_identify( void ); 53 53 void cpu_attach(size_t lid); 54 54 … … 85 85 * Configure the features of the system depending on the multiboot info. 86 86 */ 87 static void multiboot_init( )87 static void multiboot_init( void ) 88 88 { 89 89 size_t mmap_length = mb_info.mi_mmap_length; … … 118 118 /* -------------------------------------------------------------------------- */ 119 119 120 static size_t init_bootinfo_pages_nr( )120 static size_t init_bootinfo_pages_nr( void ) 121 121 { 122 122 size_t mmap_length = mb_info.mi_mmap_length; … … 273 273 static uint32_t cpuN_booted __in_kdata; 274 274 275 void start_secondary_cpus( )275 void start_secondary_cpus( void ) 276 276 { 277 277 pt_entry_t flags = PG_V | PG_KW; … … 311 311 } 312 312 313 void init_x86_64_cpuN( )313 void init_x86_64_cpuN( void ) 314 314 { 315 315 lid_t lid; … … 346 346 /* -------------------------------------------------------------------------- */ 347 347 348 static void apic_map( )348 static void apic_map( void ) 349 349 { 350 350 extern vaddr_t lapic_va, ioapic_va; … … 489 489 } 490 490 491 static void gdt_create( )491 static void gdt_create( void ) 492 492 { 493 493 memset(&gdtstore, 0, PAGE_SIZE); … … 506 506 } 507 507 508 void cpu_load_gdt( )508 void cpu_load_gdt( void ) 509 509 { 510 510 struct region_descriptor region; … … 519 519 } idt_bitmap __in_kdata; 520 520 521 int idt_slot_alloc( )521 int idt_slot_alloc( void ) 522 522 { 523 523 size_t i; … … 556 556 } 557 557 558 static void idt_create( )558 static void idt_create( void ) 559 559 { 560 560 extern uint64_t x86_traps[], x86_intrs[], x86_rsvd; … … 594 594 } 595 595 596 void cpu_load_idt( )596 void cpu_load_idt( void ) 597 597 { 598 598 struct region_descriptor region; … … 671 671 uint64_t cpu_features[4] __in_kdata; 672 672 673 void cpu_identify( )673 void cpu_identify( void ) 674 674 { 675 675 /* -
trunk/hal/x86_64/core/hal_internal.h
r368 r482 33 33 /* hal_init.c */ 34 34 void cpu_activate(uint32_t gid); 35 int idt_slot_alloc( );35 int idt_slot_alloc( void ); 36 36 void idt_slot_free(int slot); 37 37 38 38 /* hal_cpu.S */ 39 39 void invlpg(vaddr_t va); 40 void sti( );41 void cli( );42 uint64_t rdtsc( );40 void sti( void ); 41 void cli( void ); 42 uint64_t rdtsc( void ); 43 43 uint8_t in8(uint32_t port); 44 44 uint16_t in16(uint32_t port); … … 47 47 uint64_t rdmsr(uint32_t); 48 48 void wrmsr(uint32_t, uint64_t); 49 void mfence( );49 void mfence( void ); 50 50 uint64_t rcr0(void); 51 51 vaddr_t rcr2(void); … … 55 55 void lcr4(uint64_t); 56 56 void cpuid(uint32_t eax, uint32_t ecx, uint32_t *desc); 57 void tlbflushg( );58 void tlbflush( );59 void clts( );60 void stts( );61 void pause( );62 void wbinvd( );57 void tlbflushg( void ); 58 void tlbflush( void ); 59 void clts( void ); 60 void stts( void ); 61 void pause( void ); 62 void wbinvd( void ); 63 63 64 64 void cpu_context_switch(void *oldctx, void *newctx); … … 72 72 paddr_t hal_gpt_bootstrap_palloc(size_t npages); 73 73 vaddr_t hal_gpt_bootstrap_valloc(size_t npages); 74 void hal_gpt_bootstrap_reset( );75 size_t hal_gpt_bootstrap_uniformize( );74 void hal_gpt_bootstrap_reset( void ); 75 size_t hal_gpt_bootstrap_uniformize( void ); 76 76 77 77 void hal_gpt_enter(vaddr_t va, paddr_t pa, pt_entry_t flags); … … 85 85 86 86 /* x86_printf.c */ 87 void x86_lock( );88 void x86_unlock( );87 void x86_lock( void ); 88 void x86_unlock( void ); 89 89 90 90 void x86_panic(char *msg); -
trunk/hal/x86_64/core/hal_segmentation.h
r359 r482 163 163 void lidt(struct region_descriptor *); 164 164 void ltr(uint16_t); 165 tls_t *curtls( );165 tls_t *curtls( void ); 166 166 167 167 #define INTRS_ENABLED 0xFFEFAAAA -
trunk/hal/x86_64/core/hal_special.c
r457 r482 32 32 struct thread_s; 33 33 34 tls_t *curtls( )34 tls_t *curtls( void ) 35 35 { 36 36 tls_t *cputls; … … 43 43 } 44 44 45 gid_t hal_get_gid( )45 gid_t hal_get_gid( void ) 46 46 { 47 47 return curtls()->tls_gid; 48 48 } 49 49 50 cycle_t hal_time_stamp( )50 cycle_t hal_time_stamp( void ) 51 51 { 52 52 return rdtsc(); 53 53 } 54 54 55 inline reg_t hal_get_sr( )55 inline reg_t hal_get_sr( void ) 56 56 { 57 57 return 0; 58 58 } 59 59 60 uint64_t hal_get_cycles( )60 uint64_t hal_get_cycles( void ) 61 61 { 62 62 uint64_t cycles; … … 73 73 } 74 74 75 struct thread_s *hal_get_current_thread( )75 struct thread_s *hal_get_current_thread( void ) 76 76 { 77 77 return curtls()->tls_thr; … … 85 85 /* -------------------------------------------------------------------------- */ 86 86 87 void hal_fpu_enable( )87 void hal_fpu_enable( void ) 88 88 { 89 89 /* FPU not implemented yet */ … … 92 92 } 93 93 94 void hal_fpu_disable( )94 void hal_fpu_disable( void ) 95 95 { 96 96 /* FPU not implemented yet */ … … 99 99 } 100 100 101 uint32_t hal_get_stack( )101 uint32_t hal_get_stack( void ) 102 102 { 103 103 x86_panic((char *)__func__); … … 111 111 } 112 112 113 uint32_t hal_get_bad_vaddr( )113 uint32_t hal_get_bad_vaddr( void ) 114 114 { 115 115 x86_panic((char *)__func__); … … 128 128 } 129 129 130 void hal_fence( )130 void hal_fence( void ) 131 131 { 132 132 mfence(); 133 133 } 134 134 135 void hal_rdbar( )135 void hal_rdbar( void ) 136 136 { 137 137 x86_panic((char *)__func__); 138 138 } 139 139 140 void hal_core_sleep( )140 void hal_core_sleep( void ) 141 141 { 142 142 x86_panic((char *)__func__); -
trunk/hal/x86_64/core/x86_printf.c
r457 r482 46 46 static uint32_t x86_lock_val __in_kdata = 0; 47 47 48 void x86_lock( )48 void x86_lock( void ) 49 49 { 50 50 while (!hal_atomic_cas(&x86_lock_val, 0, 1)) { … … 53 53 } 54 54 55 void x86_unlock( )55 void x86_unlock( void ) 56 56 { 57 57 while (!hal_atomic_cas(&x86_lock_val, 1, 0)) { … … 72 72 } 73 73 74 static void check_scroll( )74 static void check_scroll( void ) 75 75 { 76 76 char *base = (char *)iom_base + (0xB8000 - IOM_BEGIN);
Note: See TracChangeset
for help on using the changeset viewer.