Index: trunk/hal/tsar_mips32/core/hal_context.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_context.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_context.c	(revision 570)
@@ -195,5 +195,5 @@
 
     // get ppn of remote child process page table
-    uint32_t    pt_ppn = hal_remote_lw( XPTR(child_cxy , &process->vmm.gpt.ppn) );
+    uint32_t    pt_ppn = hal_remote_l32( XPTR(child_cxy , &process->vmm.gpt.ppn) );
 
     // save CPU registers in local CPU context
@@ -245,5 +245,5 @@
     hal_cpu_context_init( thread );
 
-    // restore CPU registers ... and jump
+    // restore CPU registers ... and jump to user code
     hal_do_cpu_restore( (hal_cpu_context_t *)thread->cpu_context );
 
@@ -263,11 +263,11 @@
 
     // get relevant context slots values
-    uint32_t sp_29   = hal_remote_lw( XPTR( cxy , &ctx->sp_29   ) );
-    uint32_t ra_31   = hal_remote_lw( XPTR( cxy , &ctx->ra_31   ) );
-    uint32_t c0_sr   = hal_remote_lw( XPTR( cxy , &ctx->c0_sr   ) );
-    uint32_t c0_epc  = hal_remote_lw( XPTR( cxy , &ctx->c0_epc  ) );
-    uint32_t c0_th   = hal_remote_lw( XPTR( cxy , &ctx->c0_th   ) );
-    uint32_t c2_ptpr = hal_remote_lw( XPTR( cxy , &ctx->c2_ptpr ) );
-    uint32_t c2_mode = hal_remote_lw( XPTR( cxy , &ctx->c2_mode ) );
+    uint32_t sp_29   = hal_remote_l32( XPTR( cxy , &ctx->sp_29   ) );
+    uint32_t ra_31   = hal_remote_l32( XPTR( cxy , &ctx->ra_31   ) );
+    uint32_t c0_sr   = hal_remote_l32( XPTR( cxy , &ctx->c0_sr   ) );
+    uint32_t c0_epc  = hal_remote_l32( XPTR( cxy , &ctx->c0_epc  ) );
+    uint32_t c0_th   = hal_remote_l32( XPTR( cxy , &ctx->c0_th   ) );
+    uint32_t c2_ptpr = hal_remote_l32( XPTR( cxy , &ctx->c2_ptpr ) );
+    uint32_t c2_mode = hal_remote_l32( XPTR( cxy , &ctx->c2_mode ) );
     
     printk("\n***** CPU context for thread %x in process %x / cycle %d\n" 
Index: trunk/hal/tsar_mips32/core/hal_drivers.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_drivers.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_drivers.c	(revision 570)
@@ -26,10 +26,9 @@
 
 #include <soclib_tty.h>
-#include <soclib_mtty.h>
+#include <soclib_mty.h>
 #include <soclib_pic.h>
 #include <soclib_iob.h>
 #include <soclib_bdv.h>
 #include <soclib_hba.h>
-#include <soclib_sdc.h>
 #include <soclib_mmc.h>
 #include <soclib_nic.h>
@@ -51,16 +50,15 @@
                            uint32_t   impl )
 {
-    switch (impl) {
-    case IMPL_TXT_TTY : {
+    if( impl ==  IMPL_TXT_TTY )
+    {
         soclib_tty_init( txt );
-        break;
     }
-    case IMPL_TXT_MTY : {
-        soclib_mtty_init( txt );
-        break;
+    else if (impl == IMPL_TXT_MTY )
+    {
+        soclib_mty_init( txt );
     }
-    default : {
-        assert( false, "bad implementation" );
-    }
+    else
+    {
+        assert( false, "undefined implementation" );
     }
 }
@@ -74,5 +72,5 @@
                            uint32_t   impl )
 {
-    assert( (impl == IMPL_PIC_SCL), "bad implementation" );
+    assert( (impl == IMPL_PIC_SCL), "undefined implementation" );
 
 	soclib_pic_init( pic );
@@ -97,5 +95,5 @@
                            uint32_t   impl )
 {
-	assert( (impl == IMPL_IOB_TSR), "bad implementation" );
+	assert( (impl == IMPL_IOB_TSR), "undefined implementation" );
 
 	soclib_iob_init( iob );
@@ -126,8 +124,8 @@
 		soclib_hba_init( ioc );
 	}
-	else if (impl == IMPL_IOC_SPI)
-    {
-		soclib_sdc_init( ioc );
-	}
+//	else if (impl == IMPL_IOC_SPI)
+//  {
+//		soclib_sdc_init( ioc );
+//	}
     else 
     {
@@ -144,5 +142,5 @@
                            uint32_t   impl )
 {
-	assert( (impl == IMPL_MMC_TSR), "bad implementation" );
+	assert( (impl == IMPL_MMC_TSR), "undefined implementation" );
  
     soclib_mmc_init( mmc );
@@ -157,5 +155,5 @@
                            uint32_t   impl )
 {
-	assert( (impl == IMPL_NIC_CBF), "bad implementation" );
+	assert( (impl == IMPL_NIC_CBF), "undefined implementation" );
  
     soclib_nic_init( nic );
@@ -170,5 +168,5 @@
                            uint32_t   impl )
 {
-	assert( (impl == IMPL_DMA_SCL), "bad implementation" );
+	assert( (impl == IMPL_DMA_SCL), "undefined implementation" );
  
     soclib_dma_init( dma );
Index: trunk/hal/tsar_mips32/core/hal_exception.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_exception.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_exception.c	(revision 570)
@@ -35,7 +35,6 @@
 #include <syscalls.h>
 #include <shared_syscalls.h>
-#include <remote_spinlock.h>
+#include <remote_busylock.h>
 #include <hal_kentry.h>
-
 #include <hal_exception.h>
 
@@ -340,5 +339,4 @@
                                 error_t    error )
 {
-    uint32_t    save_sr;
     core_t    * core    = this->core;
     process_t * process = this->process;
@@ -353,5 +351,5 @@
 
     // get TXT0 lock in busy waiting mode
-    remote_spinlock_lock_busy( lock_xp , &save_sr );
+    remote_busylock_acquire( lock_xp );
 
     if( error == EXCP_USER_ERROR )
@@ -366,6 +364,6 @@
     }
 
-	nolock_printk("local locks = %d / remote locks = %d / blocked_vector = %X\n\n",
-    this->local_locks, this->remote_locks, this->blocked );
+	nolock_printk("busylocks = %d / blocked_vector = %X / flags = %X\n\n",
+    this->busylocks, this->blocked, this->flags );
 
     nolock_printk("c0_cr   %X  c0_epc  %X  c0_sr  %X  c0_th  %X\n",
@@ -394,5 +392,5 @@
 
     // release the lock
-    remote_spinlock_unlock_busy( lock_xp , save_sr );
+    remote_busylock_release( lock_xp );
 
 }  // end hal_exception_dump()
Index: trunk/hal/tsar_mips32/core/hal_gpt.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_gpt.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_gpt.c	(revision 570)
@@ -799,5 +799,5 @@
 
     // get src_pte1 
-    src_pte1 = hal_remote_lw( XPTR( src_cxy , &src_pt1[ix1] ) );
+    src_pte1 = hal_remote_l32( XPTR( src_cxy , &src_pt1[ix1] ) );
 
     // do nothing if src_pte1 not MAPPED or not SMALL
@@ -844,6 +844,6 @@
 
         // get attr and ppn from SRC_PT2
-        src_pte2_attr = hal_remote_lw( XPTR( src_cxy , &src_pt2[2 * ix2]     ) );
-        src_pte2_ppn  = hal_remote_lw( XPTR( src_cxy , &src_pt2[2 * ix2 + 1] ) );
+        src_pte2_attr = hal_remote_l32( XPTR( src_cxy , &src_pt2[2 * ix2]     ) );
+        src_pte2_ppn  = hal_remote_l32( XPTR( src_cxy , &src_pt2[2 * ix2 + 1] ) );
 
         // do nothing if src_pte2 not MAPPED
@@ -1001,5 +1001,5 @@
 
         // get PTE1 value
-        pte1 = hal_remote_lw( XPTR( gpt_cxy , &pt1[ix1] ) );
+        pte1 = hal_remote_l32( XPTR( gpt_cxy , &pt1[ix1] ) );
 
         // only MAPPED & SMALL PTEs are modified
@@ -1014,5 +1014,5 @@
   
             // get current PTE2 attributes
-            attr = hal_remote_lw( XPTR( gpt_cxy , &pt2[2*ix2] ) );
+            attr = hal_remote_l32( XPTR( gpt_cxy , &pt2[2*ix2] ) );
 
             // only MAPPED PTEs are modified        
@@ -1020,5 +1020,5 @@
             {
                 attr = (attr | TSAR_MMU_COW) & (~TSAR_MMU_WRITABLE);
-                hal_remote_sw( XPTR( gpt_cxy , &pt2[2*ix2] ) , attr );
+                hal_remote_s32( XPTR( gpt_cxy , &pt2[2*ix2] ) , attr );
             } 
         } 
@@ -1063,5 +1063,5 @@
 
     // get PTE1 value
-    pte1 = hal_remote_lw( XPTR( gpt_cxy , &pt1[ix1] ) );
+    pte1 = hal_remote_l32( XPTR( gpt_cxy , &pt1[ix1] ) );
 
     if( (pte1 & TSAR_MMU_MAPPED) == 0 ) return;
@@ -1073,11 +1073,11 @@
 
     // reset PTE2
-	hal_remote_sw( XPTR( gpt_cxy, &pt2[2 * ix2]     ) , 0 );
+	hal_remote_s32( XPTR( gpt_cxy, &pt2[2 * ix2]     ) , 0 );
 	hal_fence();
 
     // set PTE2 in this order
-	hal_remote_sw( XPTR( gpt_cxy, &pt2[2 * ix2 + 1] ) , ppn );
+	hal_remote_s32( XPTR( gpt_cxy, &pt2[2 * ix2 + 1] ) , ppn );
 	hal_fence();
-	hal_remote_sw( XPTR( gpt_cxy, &pt2[2 * ix2]     ) , tsar_attr );
+	hal_remote_s32( XPTR( gpt_cxy, &pt2[2 * ix2]     ) , tsar_attr );
 	hal_fence();
 
Index: trunk/hal/tsar_mips32/core/hal_macros.h
===================================================================
--- trunk/hal/tsar_mips32/core/hal_macros.h	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_macros.h	(revision 570)
@@ -28,5 +28,5 @@
 //     User-side, hardware dependant, macros definition.
 //
-//   Any architecture specific implementation must implement thes macros.
+//   Any architecture specific implementation must implement these macros.
 //////////////////////////////////////////////////////////////////////////////////////////
 
Index: trunk/hal/tsar_mips32/core/hal_ppm.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_ppm.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_ppm.c	(revision 570)
@@ -27,5 +27,5 @@
 #include <hal_special.h>
 #include <printk.h>
-#include <spinlock.h>
+#include <busylock.h>
 #include <process.h>
 #include <ppm.h>
@@ -46,4 +46,5 @@
 //////////////////////////////////////////////////////////////////////////////////////////
 
+
 ///////////////////////////////////////////
 error_t  hal_ppm_init( boot_info_t * info )
@@ -59,8 +60,8 @@
 
 	// initialize lock protecting the free_pages[] lists
-	spinlock_init( &ppm->free_lock );
+	busylock_init( &ppm->free_lock , LOCK_PPM_FREE );
 
 	// initialize lock protecting the dirty_pages list
-	spinlock_init( &ppm->dirty_lock );
+	queuelock_init( &ppm->dirty_lock , LOCK_PPM_DIRTY );
 
 	// initialize all free_pages[] lists as empty
Index: trunk/hal/tsar_mips32/core/hal_remote.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_remote.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_remote.c	(revision 570)
@@ -54,5 +54,5 @@
 
 /////////////////////////////////
-void hal_remote_sw( xptr_t    xp,
+void hal_remote_s32( xptr_t    xp,
                     uint32_t  data )
 {
@@ -80,5 +80,5 @@
 
 //////////////////////////////////
-void hal_remote_swd( xptr_t    xp,
+void hal_remote_s64( xptr_t    xp,
                      uint64_t  data )
 {
@@ -113,5 +113,5 @@
                      void *      pt )
 {
-    hal_remote_sw ( xp , (uint32_t)pt );
+    hal_remote_s32 ( xp , (uint32_t)pt );
 }
 
@@ -143,5 +143,5 @@
 
 ////////////////////////////////////
-uint32_t hal_remote_lw( xptr_t  xp )
+uint32_t hal_remote_l32( xptr_t  xp )
 {
 	uint32_t data;
@@ -169,5 +169,5 @@
 
 /////////////////////////////////////
-uint64_t hal_remote_lwd( xptr_t  xp )
+uint64_t hal_remote_l64( xptr_t  xp )
 {
     uint32_t data_lsb;
@@ -200,5 +200,5 @@
 void * hal_remote_lpt( xptr_t    xp )
 {
-    return (void *)hal_remote_lw ( xp );
+    return (void *)hal_remote_l32 ( xp );
 }
 
Index: trunk/hal/tsar_mips32/core/hal_special.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_special.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_special.c	(revision 570)
@@ -32,5 +32,5 @@
 struct thread_s;
 
-//////////////////////////
+////////////////////////////////
 inline gid_t hal_get_gid( void )
 {
@@ -42,5 +42,5 @@
 }
 
-/////////////////////////////
+///////////////////////////////////
 inline reg_t hal_time_stamp( void )
 {
@@ -52,5 +52,5 @@
 }
 
-/////////////////////////
+///////////////////////////////
 inline reg_t hal_get_sr( void )
 {
@@ -62,5 +62,5 @@
 }
 
-/////////////////////////
+///////////////////////////////
 uint64_t hal_get_cycles( void )
 {
@@ -94,5 +94,5 @@
 }
 
-/////////////////////////////////////////////////
+///////////////////////////////////////////////////////
 inline struct thread_s * hal_get_current_thread( void )
 {
@@ -110,5 +110,5 @@
 }
 
-/////////////////////
+///////////////////////////
 void hal_fpu_enable( void )
 {
@@ -127,5 +127,5 @@
 }
 
-//////////////////////
+////////////////////////////
 void hal_fpu_disable( void )
 {
@@ -145,5 +145,5 @@
 }
 
-////////////////////////
+//////////////////////////////
 uint32_t hal_get_stack( void )
 {
@@ -168,5 +168,5 @@
 }
 
-////////////////////////////
+//////////////////////////////////
 uint32_t hal_get_bad_vaddr( void )
 {
@@ -201,17 +201,17 @@
 }
 
-////////////////
-void hal_fence( void )
+/////////////////////////////
+inline void hal_fence( void )
 {
 	asm volatile ("sync");
 }
 
-////////////////
-void hal_rdbar( void )
+/////////////////////////////
+inline void hal_rdbar( void )
 {
 	asm volatile( "" ::: "memory" );
 }
 
-/////////////////////
+///////////////////////////
 void hal_core_sleep( void )
 {
Index: trunk/hal/tsar_mips32/core/hal_vmm.c
===================================================================
--- trunk/hal/tsar_mips32/core/hal_vmm.c	(revision 550)
+++ trunk/hal/tsar_mips32/core/hal_vmm.c	(revision 570)
@@ -64,13 +64,17 @@
     }
 
-    // get lock protecting the VSL to found the "kentry" vseg
-    remote_rwlock_wr_lock( XPTR( local_cxy , &vmm->vsegs_lock ) );
+    // get extended pointer on lock protecting the VSL
+    xptr_t lock_xp = XPTR( local_cxy , &vmm->vsegs_lock );
 
-    // scan the VSL
+    // get VSL lock 
+    remote_rwlock_wr_acquire( lock_xp );
+
+    // scan the VSL to found the "kentry" vseg
     xptr_t         root_xp = XPTR( local_cxy , &vmm->vsegs_root );
     xptr_t         iter_xp;
     xptr_t         vseg_xp;
     vseg_t       * vseg;
-    bool_t         found = false; 
+    bool_t         found = false;
+ 
     XLIST_FOREACH( root_xp , iter_xp )
     {
@@ -87,6 +91,6 @@
     }
 
-    // release the lock protecting the VSL
-    remote_rwlock_wr_unlock( XPTR( local_cxy , &vmm->vsegs_lock ) );
+    // release the VSL lock
+    remote_rwlock_wr_release( lock_xp );
 
     if( found == false ) return error;
