- Timestamp:
- Oct 22, 2019, 1:48:51 PM (5 years ago)
- Location:
- trunk/hal
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/generic/hal_drivers.h
r346 r647 25 25 #include <chdev.h> 26 26 27 void hal_drivers_txt_init( chdev_t *txt, uint32_t impl);27 void hal_drivers_txt_init( chdev_t * txt ); 28 28 29 void hal_drivers_pic_init( chdev_t *pic, uint32_t impl);29 void hal_drivers_pic_init( chdev_t * pic ); 30 30 31 void hal_drivers_iob_init( chdev_t *iob, uint32_t impl);31 void hal_drivers_iob_init( chdev_t * iob ); 32 32 33 void hal_drivers_ioc_init( chdev_t *ioc, uint32_t impl);33 void hal_drivers_ioc_init( chdev_t * ioc ); 34 34 35 void hal_drivers_mmc_init( chdev_t *mmc, uint32_t impl);35 void hal_drivers_mmc_init( chdev_t * mmc ); 36 36 37 void hal_drivers_nic_init( chdev_t *nic, uint32_t impl);37 void hal_drivers_nic_init( chdev_t * nic ); 38 38 39 void hal_drivers_dma_init(chdev_t *dma, uint32_t impl); 39 void hal_drivers_dma_init( chdev_t * dma ); 40 41 void hal_drivers_fbf_init( chdev_t * fbf ); 40 42 41 43 #endif /* HAL_DRIVERS_H_ */ -
trunk/hal/tsar_mips32/Makefile
r570 r647 24 24 $(HAL_ARCH)/build/drivers/soclib_dma.o \ 25 25 $(HAL_ARCH)/build/drivers/soclib_mmc.o \ 26 $(HAL_ARCH)/build/drivers/soclib_fbf.o \ 26 27 $(HAL_ARCH)/build/drivers/soclib_iob.o 27 28 -
trunk/hal/tsar_mips32/core/hal_context.c
r640 r647 221 221 222 222 // get base and ppn of remote child process GPT PT1 223 child_gpt_ptr = hal_remote_l 32( XPTR(child_cxy , &child_process->vmm.gpt.ptr) );223 child_gpt_ptr = hal_remote_lpt( XPTR(child_cxy , &child_process->vmm.gpt.ptr) ); 224 224 child_gpt_ppn = ppm_base2ppn( XPTR( child_cxy , child_gpt_ptr ) ); 225 225 -
trunk/hal/tsar_mips32/core/hal_drivers.c
r570 r647 34 34 #include <soclib_nic.h> 35 35 #include <soclib_dma.h> 36 #include <soclib_fbf.h> 36 37 37 38 #include <dev_txt.h> … … 46 47 /////////////////////////////////////////////////////////////////////////////// 47 48 48 ////////////////////////////////////////// 49 void hal_drivers_txt_init( chdev_t * txt, 50 uint32_t impl ) 49 /////////////////////////////////////////// 50 void hal_drivers_txt_init( chdev_t * txt ) 51 51 { 52 uint32_t impl = txt->impl; 53 52 54 if( impl == IMPL_TXT_TTY ) 53 55 { … … 68 70 /////////////////////////////////////////////////////////////////////////////// 69 71 70 ////////////////////////////////////////// 71 void hal_drivers_pic_init( chdev_t * pic, 72 uint32_t impl ) 72 /////////////////////////////////////////// 73 void hal_drivers_pic_init( chdev_t * pic ) 73 74 { 75 uint32_t impl = pic->impl; 76 74 77 assert( (impl == IMPL_PIC_SCL), "undefined implementation" ); 75 78 … … 91 94 /////////////////////////////////////////////////////////////////////////////// 92 95 93 ////////////////////////////////////////// 94 void hal_drivers_iob_init( chdev_t * iob, 95 uint32_t impl ) 96 /////////////////////////////////////////// 97 void hal_drivers_iob_init( chdev_t * iob ) 96 98 { 99 uint32_t impl = iob->impl; 100 97 101 assert( (impl == IMPL_IOB_TSR), "undefined implementation" ); 98 102 … … 112 116 /////////////////////////////////////////////////////////////////////////////// 113 117 114 ////////////////////////////////////////// 115 void hal_drivers_ioc_init( chdev_t * ioc, 116 uint32_t impl ) 118 /////////////////////////////////////////// 119 void hal_drivers_ioc_init( chdev_t * ioc ) 117 120 { 121 uint32_t impl = ioc->impl; 122 118 123 if (impl == IMPL_IOC_BDV) 119 124 { … … 138 143 /////////////////////////////////////////////////////////////////////////////// 139 144 140 ////////////////////////////////////////// 141 void hal_drivers_mmc_init( chdev_t * mmc, 142 uint32_t impl ) 145 /////////////////////////////////////////// 146 void hal_drivers_mmc_init( chdev_t * mmc ) 143 147 { 148 uint32_t impl = mmc->impl; 149 144 150 assert( (impl == IMPL_MMC_TSR), "undefined implementation" ); 145 151 … … 151 157 /////////////////////////////////////////////////////////////////////////////// 152 158 153 ////////////////////////////////////////// 154 void hal_drivers_nic_init( chdev_t * nic, 155 uint32_t impl ) 159 /////////////////////////////////////////// 160 void hal_drivers_nic_init( chdev_t * nic ) 156 161 { 162 uint32_t impl = nic->impl; 163 157 164 assert( (impl == IMPL_NIC_CBF), "undefined implementation" ); 158 165 … … 164 171 /////////////////////////////////////////////////////////////////////////////// 165 172 166 ////////////////////////////////////////// 167 void hal_drivers_dma_init( chdev_t * dma, 168 uint32_t impl ) 173 /////////////////////////////////////////// 174 void hal_drivers_dma_init( chdev_t * dma ) 169 175 { 176 uint32_t impl = dma->impl; 177 170 178 assert( (impl == IMPL_DMA_SCL), "undefined implementation" ); 171 179 … … 173 181 } 174 182 183 /////////////////////////////////////////////////////////////////////////////// 184 // FBF 185 /////////////////////////////////////////////////////////////////////////////// 186 187 /////////////////////////////////////////// 188 void hal_drivers_fbf_init( chdev_t * fbf ) 189 { 190 uint32_t impl = fbf->impl; 191 192 assert( (impl == IMPL_FBF_SCL), "undefined implementation" ); 193 194 soclib_fbf_init( fbf ); 195 } 196 -
trunk/hal/tsar_mips32/core/hal_gpt.c
r640 r647 24 24 #include <hal_kernel_types.h> 25 25 #include <hal_gpt.h> 26 #include <hal_vmm.h> 26 27 #include <hal_special.h> 27 28 #include <hal_irqmask.h> … … 291 292 uint32_t cycle = (uint32_t)hal_get_cycles(); 292 293 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 293 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )294 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 294 295 printk("\n[%s] thread[%x,%x] enters / vpn %x in cluster %x / cycle %d\n", 295 296 __FUNCTION__, this->process->pid, this->trdid, vpn, gpt_cxy, cycle ); … … 360 361 #if DEBUG_HAL_GPT_LOCK_PTE 361 362 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 362 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )363 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 363 364 printk("\n[%s] PTE1 unmapped : winner thread[%x,%x] allocates a PT2 for vpn %x in cluster %x\n", 364 365 __FUNCTION__, this->process->pid, this->trdid, vpn, gpt_cxy ); … … 371 372 #if DEBUG_HAL_GPT_LOCK_PTE 372 373 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 373 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )374 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 374 375 printk("\n[%s] PTE1 unmapped : loser thread[%x,%x] wait PTE1 for vpn %x in cluster %x\n", 375 376 __FUNCTION__, this->process->pid, this->trdid, vpn, gpt_cxy ); … … 412 413 #if DEBUG_HAL_GPT_LOCK_PTE 413 414 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 414 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )415 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 415 416 printk("\n[%s] PTE1 unmapped : loser thread[%x,%x] get PTE1 for vpn %x in cluster %x\n", 416 417 __FUNCTION__, this->process->pid, this->trdid, vpn, gpt_cxy ); … … 426 427 #if DEBUG_HAL_GPT_LOCK_PTE 427 428 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 428 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )429 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 429 430 printk("\n[%s] thread[%x,%x] get pte1 %x for vpn %x in cluster %x\n", 430 431 __FUNCTION__, this->process->pid, this->trdid, pte1, vpn, gpt_cxy ); … … 494 495 cycle = (uint32_t)hal_get_cycles(); 495 496 // if( DEBUG_HAL_GPT_LOCK_PTE < cycle ) 496 if( (vpn == 0x 3600) && (gpt_cxy == 0x11) )497 if( (vpn == 0xc1fff) && (gpt_cxy == 0x1) ) 497 498 printk("\n[%s] thread[%x,%x] success / vpn %x in cluster %x / attr %x / ppn %x / cycle %d\n", 498 499 __FUNCTION__, this->process->pid, this->trdid, vpn, gpt_cxy, pte2_attr, pte2_ppn, cycle ); -
trunk/hal/tsar_mips32/core/hal_remote.c
r625 r647 220 220 "mtc2 %4, $24 \n" /* PADDR_EXT <= cxy */ 221 221 "or $8, $0, %3 \n" /* $8 <= new */ 222 "ll $3, 0(%1) \n" /* $3 <= *p addr*/222 "ll $3, 0(%1) \n" /* $3 <= *ptr */ 223 223 "bne $3, %2, 1f \n" /* if ($3 != old) */ 224 224 "li $7, 0 \n" /* $7 <= 0 */ 225 "sc $8, (%1) \n" /* *p addr <= new*/225 "sc $8, (%1) \n" /* *ptr <= new */ 226 226 "or $7, $8, $0 \n" /* $7 <= atomic */ 227 227 "sync \n" -
trunk/hal/tsar_mips32/core/hal_uspace.c
r637 r647 142 142 // If the two buffers are aligned on a word boundary, it moves the data word per word 143 143 // in a first loop, and moves byte per byte the remaining bytes in a second loop. 144 // If the buffers are not aligned, it moves all data byte per byte.144 // If the buffers are not word aligned, it moves all data byte per byte. 145 145 /////////////////////////////////////////////////////////////////////////////////////// 146 146 // @ u_dst_ptr : pointer on destination user buffer -
trunk/hal/tsar_mips32/drivers/soclib_bdv.c
r626 r647 33 33 void soclib_bdv_init( chdev_t * chdev ) 34 34 { 35 // get extended pointer on SOCLIB_BDV peripheral base 36 xptr_t bdv_xp = chdev->base; 37 38 // set driver specific fields 35 // set driver specific fields in IOC chdev 39 36 chdev->cmd = &soclib_bdv_cmd; 40 37 chdev->isr = &soclib_bdv_isr; 41 38 39 // get extended pointer on SOCLIB_BDV peripheral base 40 xptr_t base_xp = chdev->base; 41 42 42 // get hardware device cluster and local pointer 43 cxy_t b dv_cxy = GET_CXY( bdv_xp );44 uint32_t * b dv_ptr = (uint32_t *)GET_PTR( bdv_xp );43 cxy_t base_cxy = GET_CXY( base_xp ); 44 uint32_t * base_ptr = GET_PTR( base_xp ); 45 45 46 46 // get block_size and block_count 47 uint32_t block_size = hal_remote_l32( XPTR( bdv_cxy , bdv_ptr + BDV_BLOCK_SIZE_REG ) );48 uint32_t block_count = hal_remote_l32( XPTR( b dv_cxy , bdv_ptr + BDV_SIZE_REG ) );49 50 // set IOC device descriptor extension47 uint32_t block_size = hal_remote_l32( XPTR( base_cxy , base_ptr + BDV_BLOCK_SIZE_REG ) ); 48 uint32_t block_count = hal_remote_l32( XPTR( base_cxy , base_ptr + BDV_SIZE_REG ) ); 49 50 // set IOC chdev extension fields 51 51 chdev->ext.ioc.size = block_size; 52 52 chdev->ext.ioc.count = block_count; … … 91 91 else assert( false , "illegal command" ); 92 92 93 // get IOC device cluster and local pointer93 // get cluster and local pointer on IOC chdev 94 94 cxy_t ioc_cxy = GET_CXY( ioc_xp ); 95 95 chdev_t * ioc_ptr = GET_PTR( ioc_xp ); … … 131 131 // waiting policy depends on the command type 132 132 // - for IOC_READ / IOC_WRITE commands, this function is called by the server thread 133 // that blocks and deschedules after launching the I/O transfer. 134 // The I/O operation status is reported in the command by the ISR. 135 // - for IOC_SYNC_READ / IOC_SYNC_WRITE command, this function is called by the client 136 // thread that polls the BDV status register until I/O transfer completion. 133 // => block and deschedule after launching the I/O transfer. 134 // The I/O operation status is reported in the command by the ISR, and the 135 // server thread is re-activated by the ISR. 136 // - for IOC_SYNC_READ / IOC_SYNC_WRITE, this function is called by the client thread 137 // => mask the IOC IRQ and poll the BDV status register until I/O transfer completion, 138 // and report status in the command. 137 139 138 140 if( (cmd_type == IOC_SYNC_READ) || (cmd_type == IOC_SYNC_WRITE) ) // polling policy 139 141 { 142 // get core handling the IOC IRQ 143 thread_t * server = (thread_t *)hal_remote_lpt( XPTR( ioc_cxy , &ioc_ptr->server ) ); 144 core_t * core = (core_t *)hal_remote_lpt( XPTR( ioc_cxy , &server->core ) ); 145 lid_t lid = (lid_t)hal_remote_l32( XPTR( ioc_cxy , &core->lid ) ); 146 147 // mask the IOC IRQ 148 dev_pic_disable_irq( lid , ioc_xp ); 149 140 150 // launch I/O operation on BDV device 141 151 hal_remote_s32( XPTR( seg_cxy , seg_ptr + BDV_OP_REG ) , op ); … … 149 159 (status == BDV_WRITE_SUCCESS) ) // successfully completed 150 160 { 161 // unmask IOC IRQ 162 dev_pic_enable_irq( lid , ioc_xp ); 163 164 // report success in command 151 165 hal_remote_s32( XPTR( th_cxy , &th_ptr->ioc_cmd.error ) , 0 ); 152 166 … … 154 168 cycle = (uint32_t)hal_get_cycles(); 155 169 if( (DEBUG_HAL_IOC_RX < cycle) && (cmd_type == IOC_SYNC_READ) ) 156 printk("\n[%s] thread[%x,%x] exit after SYNC_READfor client thread[%x,%x] / cycle %d\n",170 printk("\n[%s] thread[%x,%x] SYNC_READ success for client thread[%x,%x] / cycle %d\n", 157 171 __FUNCTION__, this->process->pid, this->trdid, client_pid, client_trdid, cycle ); 158 172 #endif … … 161 175 cycle = (uint32_t)hal_get_cycles(); 162 176 if( (DEBUG_HAL_IOC_TX < cycle) && (cmd_type == IOC_SYNC_WRITE) ) 163 printk("\n[%s] thread[%x,%x] exit after SYNC_WRITEfor client thread[%x,%x] / cycle %d\n",177 printk("\n[%s] thread[%x,%x] SYNC_WRITE success for client thread[%x,%x] / cycle %d\n", 164 178 __FUNCTION__, this->process->pid, this->trdid, client_pid, client_trdid, cycle ); 165 179 #endif … … 172 186 else // error reported 173 187 { 188 // unmask IOC IRQ 189 dev_pic_enable_irq( lid , ioc_xp ); 190 191 // report failure in command 174 192 hal_remote_s32( XPTR( th_cxy , &th_ptr->ioc_cmd.error ) , 1 ); 193 194 #if DEBUG_HAL_IOC_RX 195 cycle = (uint32_t)hal_get_cycles(); 196 if( (DEBUG_HAL_IOC_RX < cycle) && (cmd_type == IOC_SYNC_READ) ) 197 printk("\n[%s] thread[%x,%x] SYNC_READ failure for client thread[%x,%x] / cycle %d\n", 198 __FUNCTION__, this->process->pid, this->trdid, client_pid, client_trdid, cycle ); 199 #endif 200 201 #if DEBUG_HAL_IOC_TX 202 cycle = (uint32_t)hal_get_cycles(); 203 if( (DEBUG_HAL_IOC_TX < cycle) && (cmd_type == IOC_SYNC_WRITE) ) 204 printk("\n[%s] thread[%x,%x] SYNC_WRITE failure for client thread[%x,%x] / cycle %d\n", 205 __FUNCTION__, this->process->pid, this->trdid, client_pid, client_trdid, cycle ); 206 #endif 175 207 break; 176 208 } -
trunk/hal/tsar_mips32/drivers/soclib_fbf.c
r75 r647 2 2 * soclib_fbf.c - soclib frame-buffer driver implementation. 3 3 * 4 * Author Alain greiner (2016 )4 * Author Alain greiner (2016,2017,2018,2019) 5 5 * 6 6 * Copyright (c) UPMC Sorbonne Universites … … 22 22 */ 23 23 24 #include <soclib_fbf.h> 25 #include <hal_kernel_types.h> 26 #include <hal_uspace.h> 27 #include <chdev.h> 28 #include <dev_fbf.h> 29 #include <printk.h> 30 #include <thread.h> 31 32 /////////////////////////////////////// 33 void soclib_fbf_init( chdev_t * chdev ) 34 { 35 // set driver specific fields in FBF chdev 36 chdev->cmd = &soclib_fbf_cmd; 37 chdev->isr = NULL; 38 39 // get extended pointer on SOCLIB_FBF peripheral segment base 40 xptr_t base_xp = chdev->base; 41 42 // get cluster and local pointer for the SOCLIB_FBF peripheral segment 43 cxy_t base_cxy = GET_CXY( base_xp ); 44 uint32_t * base_ptr = GET_PTR( base_xp ); 45 46 // get frame buffer width, height, and type 47 uint32_t width = hal_remote_l32( XPTR( base_cxy , base_ptr + FBF_WIDTH_REG ) ); 48 uint32_t height = hal_remote_l32( XPTR( base_cxy , base_ptr + FBF_HEIGHT_REG ) ); 49 uint32_t type = hal_remote_l32( XPTR( base_cxy , base_ptr + FBF_SUBSAMPLING_REG ) ); 50 51 // set FBF chdev extension fields 52 chdev->ext.fbf.width = width; 53 chdev->ext.fbf.height = height; 54 chdev->ext.fbf.subsampling = type; 55 56 } // end soclib_fbf_init() 57 58 ///////////////////////////////////////////////////////////////// 59 void __attribute__((noinline)) soclib_fbf_cmd( xptr_t thread_xp ) 60 { 61 uint32_t cmd_type; // READ / WRITE / SYNC_READ / SYNC_WRITE 62 uint32_t offset; 63 uint32_t length; 64 void * buffer; // pointer on memory buffer in user space 65 xptr_t fbf_xp; 66 uint32_t status; // I/0 operation status (from BDV) 67 68 // get client thread cluster and local pointer 69 cxy_t th_cxy = GET_CXY( thread_xp ); 70 thread_t * th_ptr = GET_PTR( thread_xp ); 71 72 #if (DEBUG_HAL_FBF|| DEBUG_HAL_FBF) 73 uint32_t cycle = (uint32_t)hal_get_cycles(); 74 thread_t * this = CURRENT_THREAD; 75 process_t * process = hal_remote_lpt( XPTR( th_cxy , &th_ptr->process ) ); 76 pid_t client_pid = hal_remote_l32( XPTR( th_cxy , &process->pid ) ); 77 trdid_t client_trdid = hal_remote_l32( XPTR( th_cxy , &th_ptr->trdid ) ); 78 #endif 79 80 // get command arguments 81 cmd_type = hal_remote_l32( XPTR( th_cxy , &th_ptr->fbf_cmd.type ) ); 82 offset = hal_remote_l32( XPTR( th_cxy , &th_ptr->fbf_cmd.offset ) ); 83 length = hal_remote_l32( XPTR( th_cxy , &th_ptr->fbf_cmd.length ) ); 84 buffer = hal_remote_lpt( XPTR( th_cxy , &th_ptr->fbf_cmd.buffer ) ); 85 fbf_xp = (xptr_t)hal_remote_l64( XPTR( th_cxy , &th_ptr->fbf_cmd.dev_xp ) ); 86 87 // get cluster and local pointer on FBF chdev 88 cxy_t fbf_cxy = GET_CXY( fbf_xp ); 89 chdev_t * fbf_ptr = GET_PTR( fbf_xp ); 90 91 // get extended pointer on SOCLIB_FBF peripheral segment base 92 xptr_t base_xp = (xptr_t)hal_remote_l64( XPTR( fbf_cxy , &fbf_ptr->base ) ); 93 94 // execute command 95 if( cmd_type == FBF_READ ) // use a (kernel -> user) memcpy 96 { 97 98 #if DEBUG_HAL_FBF 99 if( DEBUG_HAL_FBF < cycle ) 100 printk("\n[%s] thread[%x,%x] / client[%x,%x] / READ / offset / length / buffer %x / cycle %d\n", 101 __FUNCTION__ , this->process->pid, this->trdid, client_pid, client_trdid, 102 offset, length, buffer, cycle ); 103 #endif 104 hal_copy_to_uspace( buffer, 105 base_xp + offset, 106 length ); 107 108 } 109 else // cmd_type == FBF_WRITE => use a (user -> kernel) memcpy 110 { 111 112 #if DEBUG_HAL_FBF 113 if( DEBUG_HAL_FBF < cycle ) 114 printk("\n[%s] thread[%x,%x] / client[%x,%x] / WRITE / offset / length / buffer %x / cycle %d\n", 115 __FUNCTION__ , this->process->pid, this->trdid, client_pid, client_trdid, 116 offset, length, buffer, cycle ); 117 #endif 118 hal_copy_from_uspace( base_xp + offset, 119 buffer, 120 length ); 121 } 122 123 // set success in command 124 hal_remote_s32( XPTR( th_cxy , &th_ptr->fbf_cmd.error ) , 0 ); 125 126 } // end soclib_fbf_cmd() 127 -
trunk/hal/tsar_mips32/drivers/soclib_fbf.h
r75 r647 1 1 /* 2 * soclib_fbf.h - soclib frame-buffer driver definition .2 * soclib_fbf.h - soclib frame-buffer driver definition (used in TSAR_IOB architecture). 3 3 * 4 * Author Alain greiner (2016 )4 * Author Alain greiner (2016,2017,2018,2019) 5 5 * 6 6 * Copyright (c) UPMC Sorbonne Universites … … 22 22 */ 23 23 24 #ifndef _SOCLIB_FB _H_25 #define _SOCLIB_FB _H_24 #ifndef _SOCLIB_FBF_H_ 25 #define _SOCLIB_FBF_H_ 26 26 27 #include <chdev.h> 28 #include <hal_kernel_types.h> 29 30 /**************************************************************************************** 31 * This driver supports the vci_fbf_tsar component. 32 * 33 * This hardware component supports both a frame buffer, and a set of addressable 34 * configuration status registers. 35 ***************************************************************************************/ 36 37 /**************************************************************************************** 38 * SOCLIB_FBF registers offsets 39 * The three addressables registers are on top of the 4 Mbytes allocated 40 * to the frame buffer itself. 41 ***************************************************************************************/ 42 43 enum SoclibFrameBufferRegisters 44 { 45 FBF_WIDTH_REG = 0x100000, 46 FBF_HEIGHT_REG = 0x100001, 47 FBF_SUBSAMPLING_REG = 0x100002, 48 }; 49 50 /**************************************************************************************** 51 * This function access the SOCLIB_FBF hardware registers, to get the frame buffer 52 * size and type, and update the FBF device extension. 53 **************************************************************************************** 54 * @ chdev : pointer on the FBF chdev descriptor. 55 ***************************************************************************************/ 56 void soclib_fbf_init( chdev_t * chdev ); 57 58 /**************************************************************************************** 59 * This function implements the FBF_READ and FBF_WRITE commands registered in the client 60 * thread descriptor identified by the <thread_xp> argument. 61 * It is called directly by the client thread. 62 * ************************************************************************************** 63 * @ thread_xp : extended pointer on client thread descriptor. 64 ***************************************************************************************/ 65 extern void soclib_fbf_cmd( xptr_t thread_xp ); 27 66 28 67 #endif
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