Changeset 653
- Timestamp:
- Nov 14, 2019, 4:00:51 PM (5 years ago)
- Location:
- trunk/boot/tsar_mips32
- Files:
-
- 3 edited
-
boot.c (modified) (10 diffs)
-
boot_config.h (modified) (1 diff)
-
boot_entry.S (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/boot/tsar_mips32/boot.c
r637 r653 30 30 * * 31 31 * The 'boot.elf' file (containing the boot-loader binary code) is stored * 32 * on disk (not in the FAT file system), and must be loaded into memory by*33 * the preloader running on the core[0][0] (cxy = 0 / lid = 0).*32 * on disk (not in the FAT file system), and must be loaded into memory * 33 * by the generic (OS undependant) preloader. * 34 34 * * 35 35 * The main task of the boot-loader is to load in the first physical page * … … 37 37 * and to build - in each cluster - a cluster specific description of the * 38 38 * hardware archtecture, stored in the "kdata" segment as the boot_info_t * 39 * structure. The "kernel.elf" and "arch_info.bin" files are supposed to be*40 * stored on disk in a FAT32 file system.*39 * structure. These "kernel.elf" and "arch_info.bin" files are supposed * 40 * to be stored on disk in a FAT32 file system. * 41 41 * * 42 42 * All cores contribute to the boot procedure, but all cores are not * … … 49 49 * actual kernel initialisation. * 50 50 * * 51 * Implementation note: * * * 51 * Implementation note: * 52 * * 52 53 * To allows each core to use the local copy of both the boot code and the * 53 54 * kernel code, the boot-loader builds a minimal and temporary BPT (Boot * … … 768 769 { 769 770 /************************************i********************** 770 * PHASE Sequencial : only core[0 ][0] executes it771 * PHASE Sequencial : only core[0,0] executes it 771 772 **********************************************************/ 772 773 if (cxy == 0) 773 774 { 774 boot_printf("\n[BOOT] core[%x,%d] active at cycle %d\n",775 cxy, lid, boot_get_proctime() );776 777 775 // Initialize IOC driver 778 776 if (USE_IOC_BDV) boot_bdv_init(); … … 830 828 boot_activate_ins_mmu( 0 ); 831 829 832 // Activate other core[cxy ][0] / get number of activated cores830 // Activate other core[cxy,0] / set number of activated cores 833 831 active_cores_nr = boot_wake_all_cp0s() + 1; 834 832 835 // Wait until all clusters (i.e all CP0s) ready to enter kernel.833 // Wait until all clusters (i.e all core[cxy,0]) ready to enter kernel. 836 834 boot_remote_barrier( XPTR( BOOT_CORE_CXY , &global_barrier ) , 837 835 active_cores_nr ); … … 845 843 } 846 844 /************************************************************************** 847 * PHASE partially parallel : all core[cxy ][0] with (cxy != 0) execute it845 * PHASE partially parallel : all core[cxy,0] with (cxy != 0) execute it 848 846 **************************************************************************/ 849 847 else 850 848 { 851 849 // at this point, the DATA extension registers point 852 // alreadyon the local cluster cxy to use the local stack,850 // on the local cluster cxy to use the local stack, 853 851 // but all cores must access the code stored in cluster 0 854 852 855 #if DEBUG_BOOT_MULTI 856 boot_printf("\n[BOOT] core[%x,%d] active at cycle %d\n", 857 cxy, lid, boot_get_proctime() ); 858 #endif 859 // Each core[cxy][0] copies the boot code (data and instructions) 853 // Each core[cxy,0] copies the boot code (data and instructions) 860 854 // from the cluster 0 to the local cluster. 861 855 boot_remote_memcpy( XPTR( cxy , BOOT_BASE ), … … 864 858 865 859 // from now, it is safe to refer to the boot global variables 866 boot_printf("\n[BOOT] core[%x,%d] replicated boot code at cycle %d\n", 867 cxy , lid , boot_get_proctime() ); 868 860 861 #if DEBUG_BOOT_MULTI 862 boot_printf("\n[BOOT] core[%x,%d] replicated boot code at cycle %d\n", 863 cxy , lid , boot_get_proctime() ); 864 #endif 869 865 // identity maps two big pages for the boot and kernel code, 870 866 boot_page_table_init( cxy ); … … 873 869 boot_activate_ins_mmu( cxy ); 874 870 875 // Each CP0copies the arch_info.bin into the local memory.871 // Each core[cxy,0] copies the arch_info.bin into the local memory. 876 872 boot_remote_memcpy(XPTR(cxy, ARCHINFO_BASE), 877 873 XPTR(BOOT_CORE_CXY, ARCHINFO_BASE), 878 874 ARCHINFO_MAX_SIZE ); 879 880 881 882 875 #if DEBUG_BOOT_MULTI 876 boot_printf("\n[BOOT] core[%x,%d] replicated arch_info at cycle %d\n", 877 cxy , lid , boot_get_proctime() ); 878 #endif 883 879 // copy the kcode segment into local memory 884 880 boot_remote_memcpy( XPTR( cxy , seg_kcode_base ), … … 886 882 seg_kcode_size ); 887 883 888 // Each CP0copies the kdata segment into local memory884 // Each core[cxy,0] copies the kdata segment into local memory 889 885 boot_remote_memcpy( XPTR( cxy , seg_kdata_base ), 890 886 XPTR( BOOT_CORE_CXY , seg_kdata_base ), 891 887 seg_kdata_size ); 892 893 894 895 896 // Each CP0get local boot_info_t structure base address.888 #if DEBUG_BOOT_MULTI 889 boot_printf("\n[BOOT] core[%x,%d] replicated kernel code at cycle %d\n", 890 cxy , lid , boot_get_proctime() ); 891 #endif 892 // Each core[cxy,0] get local boot_info_t structure base address. 897 893 boot_info = (boot_info_t*)seg_kdata_base; 898 894 899 // Each CP0initializes local boot_info_t structure.895 // Each core[cxy,0] initializes local boot_info_t structure. 900 896 boot_info_init( boot_info , cxy ); 901 897 902 boot_printf("\n[BOOT] core[%x,%d] initialised boot_info at cycle %d\n", 903 cxy , lid , boot_get_proctime() ); 904 905 // Each CP0 checks core information. 898 #if DEBUG_BOOT_MULTI 899 boot_printf("\n[BOOT] core[%x,%d] initialised boot_info at cycle %d\n", 900 cxy , lid , boot_get_proctime() ); 901 #endif 902 // Each core[cxy,0] checks core information. 906 903 boot_check_core( boot_info , lid ); 907 904 908 // Each CP0get number of active clusters from BOOT_CORE cluster905 // Each core[cxy,0] get number of active clusters from BOOT_CORE cluster 909 906 uint32_t count = boot_remote_lw( XPTR( 0 , &active_cores_nr ) ); 910 907 … … 923 920 { 924 921 /*********************************************************************** 925 * PHASE fully parallel : all cores[cxy ][lid] with (lid! = 0) execute it922 * PHASE fully parallel : all cores[cxy,lid] with (lid! = 0) execute it 926 923 **********************************************************************/ 927 924 928 #if DEBUG_BOOT_MULTI929 boot_printf("\n[BOOT] core[%x,%d] active at cycle %d\n",930 cxy, lid, boot_get_proctime() );931 #endif932 925 // activate the instruction MMU to use the local copy of the boot code 933 926 boot_activate_ins_mmu( cxy ); -
trunk/boot/tsar_mips32/boot_config.h
r624 r653 19 19 // cache line 20 20 #define CACHE_LINE_SIZE 64 21 22 // core[x][y][p] identifier format 23 #define X_WIDTH 4 24 #define Y_WIDTH 4 25 #define P_WIDTH 2 21 26 22 27 // paths for kernel.elf and arch_info.bin files -
trunk/boot/tsar_mips32/boot_entry.S
r623 r653 22 22 */ 23 23 24 /********************************************************************************************** 25 * This file contains the entry point of the ALMOS-MK boot-loader for TSAR architecture, * 26 * that is a generic multi-clusters / multi-processors architecture. * 27 * * 28 * - The number of clusters is defined by the (X_SIZE, Y_SIZE) parameters in the * 29 * hard_config.h file (up to 256 clusters). * 30 * - The number of processors per cluster is defined by the NB_PROCS_MAX parameter in the * 31 * hard_config.h file (up to 4 processors per cluster). * 32 * * 33 * This assembly code is executed by all cores, but at the same time, because all cores * 34 * are not simultaneously activated. It makes the assuption that the CPO register containing * 35 * the core gid (global hardware identifier) has a fixed format: * 36 * gid == (((x << Y_WIDTH) + y) << P_WIDTH) + lid * 37 * * 38 * It does 3 things: * 39 * - It initializes the stack pointer depending on the lid extracted from the gid, * 40 * using the BOOT_STACK_BASE and BOOT_STACK_SIZE parameters defined in the * 41 * 'boot_config.h' file, * 42 * - It changes the value of the DATA address extension register using the cxy extracted * 43 * from the gid, * 44 * - It jumps to the boot_loader() function defined in the 'boot.c' file, passing the two * 45 * arguments (cxy and lid). * 46 *********************************************************************************************/ 24 /**********************************************************************************************/ 25 /* This file contains the entry point of the ALMOS-MK boot-loader for the TSAR architecture, */ 26 /* that is a generic multi-clusters / multi-processors architecture. */ 27 /* */ 28 /* This assembly code is executed by all cores, but not at the same time, because all cores */ 29 /* are not simultaneously activated. It makes the assuption that the CPO register containing */ 30 /* the core gid (global hardware identifier) has a fixed format: */ 31 /* gid == (((x << Y_WIDTH) + y) << P_WIDTH) + lid */ 32 /* */ 33 /* It does 3 things: */ 34 /* - It initializes the stack pointer depending on the lid extracted from the gid, */ 35 /* using the BOOT_STACK_BASE and BOOT_STACK_SIZE parameters that are defined in */ 36 /* the boot_config.h file, */ 37 /* - It changes the value of the DATA address extension register using the cxy extracted */ 38 /* from the gid, with X_WIDTH, Y_WIDTH, P_WIDTH defined in the boot¨config.h file. */ 39 /* - It jumps to the boot_loader() function defined in the 'boot.c' file, passing the two */ 40 /* arguments (cxy and lid). */ 41 /**********************************************************************************************/ 47 42 48 43 #include "mips32_registers.h" 49 #include "hard_config.h"50 44 #include "boot_config.h" 51 45
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