Changeset 82
- Timestamp:
- Jun 28, 2017, 1:23:51 PM (7 years ago)
- Location:
- trunk
- Files:
-
- 8 edited
- 2 moved
Legend:
- Unmodified
- Added
- Removed
-
trunk/Makefile.x86
r77 r82 62 62 build/kernel/hal/hal_kentry.o \ 63 63 build/kernel/hal/hal_acpi.o \ 64 build/kernel/hal/hal_ lapic.o\64 build/kernel/hal/hal_apic.o \ 65 65 build/kernel/hal/x86_printf.o \ 66 66 build/kernel/hal/hal_drivers.o \ … … 300 300 hal/x86_64/core/hal_segmentation.h \ 301 301 hal/x86_64/core/hal_acpi.h \ 302 hal/x86_64/core/hal_ lapic.h\302 hal/x86_64/core/hal_apic.h \ 303 303 hal/x86_64/core/hal_internal.h \ 304 304 kernel_config.h \ … … 338 338 $(DU) -D $@ > $@.txt 339 339 340 build/kernel/hal/hal_ lapic.o: hal/x86_64/core/hal_lapic.c\341 hal/x86_64/core/hal_ lapic.h\340 build/kernel/hal/hal_apic.o: hal/x86_64/core/hal_apic.c \ 341 hal/x86_64/core/hal_apic.h \ 342 342 kernel_config.h \ 343 343 hal/x86_64/core/hal_types.h -
trunk/hal/x86_64/core/hal_apic.c
r81 r82 1 1 /* 2 * hal_ lapic.c - Local APIC2 * hal_apic.c - Advanced Programmable Interrupt Controller 3 3 * 4 4 * Copyright (c) 2017 Maxime Villard … … 21 21 22 22 #include <hal_types.h> 23 #include <hal_register.h> 23 24 #include <hal_segmentation.h> 24 #include <hal_ lapic.h>25 #include <hal_apic.h> 25 26 #include <hal_internal.h> 26 27 … … 34 35 #include <cluster.h> 35 36 37 /* -------------------------------------------------------------------------- */ 38 39 #define PIC1_CMD 0x0020 40 #define PIC1_DATA 0x0021 41 #define PIC2_CMD 0x00a0 42 #define PIC2_DATA 0x00a1 43 44 static void hal_pic_init() 45 { 46 /* 47 * Disable the PIC (8259A). We are going to use IOAPIC instead. 48 */ 49 out8(PIC1_DATA, 0xff); 50 out8(PIC2_DATA, 0xff); 51 } 52 53 /* -------------------------------------------------------------------------- */ 54 36 55 paddr_t lapic_pa __in_kdata = 0; 37 56 vaddr_t lapic_va __in_kdata = 0; … … 39 58 void hal_lapic_write(uint32_t reg, uint32_t val) 40 59 { 41 *((volatile uint32_t *)( lapic_va + reg)) = val;60 *((volatile uint32_t *)((uint8_t *)lapic_va + reg)) = val; 42 61 } 43 62 44 63 uint32_t hal_lapic_read(uint32_t reg) 45 64 { 46 return *((volatile uint32_t *)( lapic_va + reg));65 return *((volatile uint32_t *)((uint8_t *)lapic_va + reg)); 47 66 } 48 67 … … 52 71 } 53 72 54 void hal_lapic_init() 73 /* 74 * We have 8 interrupt sources: 75 * - Spurious 76 * - APIC Timer (TMR) 77 * - Local Interrupt 0 (LINT0) 78 * - Local Interrupt 1 (LINT1) 79 * - Performance Monitor Counters (PMC) 80 * - Thermal Sensors (THM) 81 * - APIC internal error (ERR) 82 * - Extended (Implementation dependent) 83 */ 84 static void hal_lapic_init() 55 85 { 56 86 lapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared 87 88 if ((rdmsr(MSR_APICBASE) & APICBASE_PHYSADDR) != lapic_pa) { 89 x86_panic("APICBASE and ACPI don't match!\n"); 90 } 91 wrmsr(MSR_APICBASE, lapic_pa | APICBASE_EN); 57 92 58 93 hal_gpt_enter(lapic_va, lapic_pa); 59 94 60 95 hal_lapic_write(LAPIC_TPR, 0); 96 hal_lapic_write(LAPIC_EOI, 0); 61 97 hal_lapic_write(LAPIC_SVR, LAPIC_SVR_ENABLE|LAPIC_SPURIOUS_VECTOR); 98 99 /* Explicitly disable (mask) each vector */ 100 hal_lapic_write(LAPIC_LVT_TMR, LAPIC_TMR_M); 101 hal_lapic_write(LAPIC_LVT_LINT0, LAPIC_LINT_M); 102 hal_lapic_write(LAPIC_LVT_LINT1, LAPIC_LINT_M); 103 hal_lapic_write(LAPIC_LVT_PMC, LAPIC_PMC_M); 104 hal_lapic_write(LAPIC_LVT_THM, LAPIC_THM_M); 105 hal_lapic_write(LAPIC_LVT_ERR, LAPIC_ERR_M); 62 106 } 63 107 108 /* -------------------------------------------------------------------------- */ 109 110 void hal_apic_init() 111 { 112 /* Disable the PIC */ 113 hal_pic_init(); 114 115 /* Enable the LAPIC */ 116 hal_lapic_init(); 117 } 118 -
trunk/hal/x86_64/core/hal_apic.h
r81 r82 1 1 /* 2 * hal_ lapic.h - Local APIC values3 * 2 * hal_apic.h - APIC values (for LAPIC and IOAPIC) 3 * 4 4 * Copyright (c) 2017 Maxime Villard 5 * 5 * 6 6 * This file is part of ALMOS-MKH. 7 7 * … … 21 21 22 22 uint32_t hal_lapic_gid(); 23 void hal_ lapic_init();23 void hal_apic_init(); 24 24 25 25 #define LAPIC_SPURIOUS_VECTOR LAPICVEC_MIN … … 103 103 #define LAPIC_ICRHI 0x310 /* Int. cmd. RW */ 104 104 105 #define LAPIC_LVT T0x320 /* Loc.vec.(timer) RW */106 # define LAPIC_ LVTT_VEC_MASK 0x000000ff107 # define LAPIC_ LVTT_DS 0x00001000108 # define LAPIC_ LVTT_M 0x00010000109 # define LAPIC_ LVTT_TM 0x00020000105 #define LAPIC_LVT_TMR 0x320 /* Loc.vec.(timer) RW */ 106 # define LAPIC_TMR_VEC_MASK 0x000000ff 107 # define LAPIC_TMR_DS 0x00001000 108 # define LAPIC_TMR_M 0x00010000 109 # define LAPIC_TMR_TM 0x00020000 110 110 111 #define LAPIC_TMINT 0x330 /* Loc.vec (Thermal) RW */ 112 #define LAPIC_PCINT 0x340 /* Loc.vec (Perf Mon) RW */ 113 #define LAPIC_LVINT0 0x350 /* Loc.vec (LINT0) RW */ 114 # define LAPIC_LVT_DM_MASK 0x00000700 115 # define LAPIC_LVT_DM_FIXED 0x00000000 116 # define LAPIC_LVT_DM_SMI 0x00000200 117 # define LAPIC_LVT_DM_NMI 0x00000400 118 # define LAPIC_LVT_DM_INIT 0x00000500 119 # define LAPIC_LVT_DM_EXTINT 0x00000700 120 # define LAPIC_LVT_MASKED 0x00010000 121 # define LAPIC_LVT_LEVTRIG 0x00008000 122 # define LAPIC_LVT_REMOTE_IRR 0x00004000 123 # define LAPIC_INP_POL 0x00002000 124 # define LAPIC_PEND_SEND 0x00001000 111 #define LAPIC_LVT_THM 0x330 /* Loc.vec (Thermal) RW */ 112 # define LAPIC_THM_MT_MASK 0x00000700 113 # define LAPIC_THM_MT_FIXED 0x00000000 114 # define LAPIC_THM_MT_SMI 0x00000200 115 # define LAPIC_THM_MT_NMI 0x00000400 116 # define LAPIC_THM_MT_INIT 0x00000500 117 # define LAPIC_THM_MT_EXTINT 0x00000700 118 # define LAPIC_THM_DS 0x00001000 119 # define LAPIC_THM_M 0x00010000 125 120 126 #define LAPIC_LVINT1 0x360 /* Loc.vec (LINT1) RW */ 127 #define LAPIC_LVERR 0x370 /* Loc.vec (ERROR) RW */ 121 #define LAPIC_LVT_PMC 0x340 /* Loc.vec (Perf Mon) RW */ 122 # define LAPIC_PMC_MT_MASK 0x00000700 123 # define LAPIC_PMC_MT_FIXED 0x00000000 124 # define LAPIC_PMC_MT_SMI 0x00000200 125 # define LAPIC_PMC_MT_NMI 0x00000400 126 # define LAPIC_PMC_MT_INIT 0x00000500 127 # define LAPIC_PMC_MT_EXTINT 0x00000700 128 # define LAPIC_PMC_DS 0x00001000 129 # define LAPIC_PMC_M 0x00010000 130 131 #define LAPIC_LVT_LINT0 0x350 /* Loc.vec (LINT0) RW */ 132 #define LAPIC_LVT_LINT1 0x360 /* Loc.vec (LINT1) RW */ 133 # define LAPIC_LINT_MT_MASK 0x00000700 134 # define LAPIC_LINT_MT_FIXED 0x00000000 135 # define LAPIC_LINT_MT_SMI 0x00000200 136 # define LAPIC_LINT_MT_NMI 0x00000400 137 # define LAPIC_LINT_MT_INIT 0x00000500 138 # define LAPIC_LINT_MT_EXTINT 0x00000700 139 # define LAPIC_LINT_DS 0x00001000 140 # define LAPIC_LINT_RIR 0x00004000 141 # define LAPIC_LINT_TGM 0x00008000 142 # define LAPIC_LINT_M 0x00010000 143 144 #define LAPIC_LVT_ERR 0x370 /* Loc.vec (ERROR) RW */ 145 # define LAPIC_ERR_MT_MASK 0x00000700 146 # define LAPIC_ERR_MT_FIXED 0x00000000 147 # define LAPIC_ERR_MT_SMI 0x00000200 148 # define LAPIC_ERR_MT_NMI 0x00000400 149 # define LAPIC_ERR_MT_INIT 0x00000500 150 # define LAPIC_ERR_MT_EXTINT 0x00000700 151 # define LAPIC_ERR_DS 0x00001000 152 # define LAPIC_ERR_M 0x00010000 153 128 154 #define LAPIC_ICR_TIMER 0x380 /* Initial count RW */ 129 155 #define LAPIC_CCR_TIMER 0x390 /* Current count RO */ -
trunk/hal/x86_64/core/hal_cpu.S
r78 r82 47 47 ret 48 48 49 ASM_ENTRY(out8) 50 movq %rdi,%rdx 51 movq %rsi,%rax 52 outb %al,%dx 53 ret 54 49 55 ASM_ENTRY(rdmsr) 50 56 movq %rdi,%rcx … … 63 69 ret 64 70 71 ASM_ENTRY(x86_stop) /* debug only */ 72 int $0x0b 73 ret 74 -
trunk/hal/x86_64/core/hal_init.c
r81 r82 25 25 #include <hal_segmentation.h> 26 26 #include <hal_acpi.h> 27 #include <hal_ lapic.h>27 #include <hal_apic.h> 28 28 #include <hal_internal.h> 29 29 #include <hal_remote.h> … … 171 171 x86_printf("[+] hal_gpt_bootstrap_reset called\n"); 172 172 173 hal_ lapic_init();174 x86_printf("[+] hal_ lapic_init called\n");173 hal_apic_init(); 174 x86_printf("[+] hal_apic_init called\n"); 175 175 176 176 hal_tls_init_cpu0(); … … 187 187 x86_printf("[+] kernel_init called\n"); 188 188 189 // void x86_stop(); 190 // x86_stop(); 189 191 190 192 sti(); 191 while (1);192 193 193 194 int m = 0; -
trunk/hal/x86_64/core/hal_internal.h
r81 r82 35 35 void sti(); 36 36 void cli(); 37 void out8(uint32_t port, uint8_t val); 37 38 uint64_t rdmsr(uint32_t); 38 39 void wrmsr(uint32_t, uint64_t); -
trunk/hal/x86_64/core/hal_kentry.S
r80 r82 73 73 74 74 ASM_ENTRY(x86_trap0b) 75 ZTRAPENTRY(T_SEGNPFLT)75 TRAPENTRY(T_SEGNPFLT) 76 76 77 77 ASM_ENTRY(x86_trap0c) 78 ZTRAPENTRY(T_STKFLT)78 TRAPENTRY(T_STKFLT) 79 79 80 80 ASM_ENTRY(x86_trap0d) 81 ZTRAPENTRY(T_PROTFLT)81 TRAPENTRY(T_PROTFLT) 82 82 83 83 ASM_ENTRY(x86_trap0e) -
trunk/hal/x86_64/core/hal_register.h
r51 r82 81 81 #define MSR_KERNELGSBASE 0xc0000102 /* storage for swapgs ins */ 82 82 83 #define MSR_APICBASE 0x01b 84 #define APICBASE_BSP 0x00000100 /* boot processor */ 85 #define APICBASE_EXTD 0x00000400 /* x2APIC mode */ 86 #define APICBASE_EN 0x00000800 /* software enable */ 87 #define APICBASE_PHYSADDR 0xfffff000 /* physical address */ 88 -
trunk/hal/x86_64/core/hal_special.c
r71 r82 21 21 22 22 #include <hal_types.h> 23 #include <hal_ lapic.h>23 #include <hal_apic.h> 24 24 #include <hal_special.h> 25 25 #include <hal_register.h> -
trunk/hal/x86_64/core/hal_trap.c
r78 r82 67 67 x86_printf("%s\n", (char *)buf); 68 68 x86_printf("-> rip = %Z\n", tf->tf_rip); 69 x86_printf("-> rsp = %Z\n", tf->tf_rsp); 69 70 x86_printf("****** FAULT OCCURRED ******\n\n"); 70 71
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