= Hardware Platform Definition = [[PageOutline]] ALMOS-MK has been designed to support clustered manycore architectures, using 32 bits cores (such as the MIPS32 based TSAR architecture), or 64 bits cores (such as the I64 based multicores INTEL/AMD architectures). Each cluster contains one or several cores, a variable number of addressable peripherals, and one physical memory bank. ALMOS-MK implement one kernel instance per cluster. All relevant parameters describing the clustered multi-core architecture must be defined in the binary '''arch_info.bin''' file. This binary file is exploited by the ALMOS-MK boot loader to configure ALMOS-MK. It can be generated by a specific '''arch.py''' python scrip, for each target architecture. == 1) Cluster and cores identification == === 1.1) Cluster identification === To identify a cluster in the clustered architecture, ALMOS-MK uses an unique cluster identifier '''cxy'''. ALMOS-MK does not make any assumption on the clusters topology, but makes the assumption that the '''cxy''' binary value can be directly concatened to the local physical address (address inside a cluster) to build a global physical address. Warning: The cluster identifier '''cxy''' is NOT a continuous index, and cannot be used to index a cluster array. The size of the local physical address space (inside a cluster) is defined by a global parameter, that is the number of bits in a local physical address. The value of this parameter is 32 in architectures using 32 bits cores, but it can be larger in architectures using 64 bits cores. Any physical address is coded on 64 bits in ALMOS-MK. Note : In architectures where the clusters are organized as a 2D mesh topology, is is generally possible to derive the [x,y] cluster coordinates from the '''cxy''' cluster identifier, and ALMOS-MK can use it to optimize placement and improve locality, but this optimisation is NOT mandatory, and ALMOS-MK supports architectures where the set of cluster is simply a linear vector of clusters. === 1.2) Core identification == ALMOS-MK makes the assumption that each physical core contains an hardware addressable register defining an unique global identifier (called '''gid''') with the only constraint that two different cores have two different '''gid'''. To identify a specific core in the clustered architecture, ALMOS-MK does not use directly this physical '''gid''', but uses a composite index '''[cxy,lid]''', where '''cxy''' is the cluster identifier, and '''lid''' is a local core index. This '''lid''' index is a continuous index in [0,N-1], where N can depend on the cluster, but cannot be larger than the global parameter CONFIG_MAX_CORE_PER_CLUSTER_NR. The association of a composite index '''[cx,lid]''' to a global physical identifier '''gid''', is defined in the '''arch_info.bin''' file. == 2) Hardware architecture description == For ALMOS-MK, the target hardware architecture is described in the binary file '''arch_info.bin'''. This file is loaded from disk by the ALMOS-MK boot-loader. This boot-loader uses the informations found in '''arch_info.bin''' to build one '''boot_info_t''' structure in each cluster. This generic '''boot_info_t''' structure is the hardware abstraction used by the ALMOS kernel to build in each cluster its own representation of the hardware. === 2.1) General assumptions === * Each cluster contains a variable number of cores, a variable number of peripherals, and a physical memory bank. * The number of clusters is variable (can be one). * The cluster topology is variable (2D mesh or vector) * The number of cores per cluster is variable (can be zero). * The number of addressable peripherals per cluster is variable. * The size of the physical memory bank per cluster is variable. * Each cluster cover a fixed size segment in the physical address space. === 2.2) the arch_info_t structure === The binary file '''arch_info.bin''' is a BLOB containing the binary form of the C arch_info_t structure. This structure has a three levels hierarchical organisation: * the architecture contains a variable number of clusters. * each cluster contains a variable number of cores and a variable number of addressable devices. * some devices contains a variable number of input IRQs. An adressable device can be a physical memory bank, or a peripheral containing addressable registers. The '''arch_info.bin''' BLOB is organised as the concatenation of a fixed size header, and 4 variable size arrays of fixed size objects: * archinfo_cluster_t cluster[] * archinfo_core_t core[] * archinfo_device_t device[] * archinfo_irq_t irq[] These five C structures are described in the file [source:almost-work/tools/arch_info/arch_info.h arch_info.h].