Changes between Version 3 and Version 4 of nic_device_api
- Timestamp:
- Jan 26, 2020, 10:55:01 PM (5 years ago)
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nic_device_api
v3 v4 6 6 7 7 8 This device provide access to an external generic Gigabit Ethernet network controller. It assume that the NIC hardware peripheral has a DMA capability, and can access two packets queues in kernel memory for sent (TX) and received (RX) packets. Packets are (Ethernet/IPV4).8 This device allows the kernel to access an external generic Gigabit Ethernet network controller. It assume that the NIC hardware peripheral has a DMA capability, and can access two packets queues in kernel memory for sent (TX) and received (RX) packets. Packets are Ethernet/IPV4. 9 9 10 The NIC device is handling two (infinite) streams of packets to or from the network. It is the driver responsibility to move the RX packets from the NIC to the RX queue, and the TX packets from the TX queue to the NIC.10 The NIC device is handling two (infinite) streams of packets to or from the network. It is the driver responsibility to move the RX packets from the hardware NIC to the software RX queue, and to move the TX packets from the software TX queue to the hardware NIC. 11 11 12 AS the RX and TX queues are independant, there is one NIC-RX device descriptor to handle RX packets, and another NIC-TX device descriptor to handle TX packets. In order to improve throughput, the hardware NIC controller can (optionnally) implements multiple (N) channels:12 AS the RX and TX queues are independant, there is one NIC-RX chdev descriptor to handle RX packets, and another NIC-TX chdev descriptor to handle TX packets. In order to improve throughput, the hardware NIC controller can (optionnally) implements multiple (N) channels. To share the load between channels, the hardware is supposed to use an hash key : 13 13 * The RX channels are indexed by an hash key derived from the source IP address. 14 14 * The TX channels are indexed by an hash key derived from the destination IP address. 15 These 2*N chdev descriptors, and 2*N associated server threads, are distributed in clusters. 16 The 2*N server threads implement the protocols stack. The RX server threads block and deschedule when the RX queue is empty. The TX server threads block and deschedule when the TX queue is full. 15 These 2*N chdev descriptors, and 2*N associated server threads, are distributed in clusters. 17 16 18 It is the driver responsibily to re-activate a blocked server thread when the queue state is modified: not full for TX, or not empty for RX. 17 The 2*N server threads implement the protocols stack. 19 18 20 The WTI mailboxes used by the driver ro receive events from the NIC hardware (available RX packet, or free TX slot, for a given channel), must be statically allocated during the kernel initialisation phase, and must be routed to the cluster containing the associated device descriptor and server thread. 19 The RX server threads block and deschedule when the RX queue is empty. The TX server threads block and deschedule when the TX queue is full. It is the driver responsibily to re-activate a blocked server thread when the queue state is modified: not full for TX, or not empty for RX. 20 21 The WTI mailboxes used to receive the NIC_TX_IRQ[N] and NIC_RX_IRQ[N] (one IRQ per channel and per direction) to signal available RX packet, or free TX slot, for a given channel, must be statically allocated during the kernel initialisation phase. They are routed to the cluster containing the associated chdev descriptor and The associated server thread. 21 22 22 23 The generic NIC device "kernel" API defines two functions: … … 25 26 This "kernel" API is detailed in section C below. 26 27 27 All RX or TX paquets are sent or received in standard 2 Kbytes kernel buffers, that are dynamically allocated by the server threads. The structure ''pkd_t'' defining a packet descriptor contains the buffer pointer and the actual Ethernet packet length in bytes.28 All RX or TX paquets are sent or received in standard 2 Kbytes kernel buffers, that are dynamically allocated by the server threads. The structure ''pkd_t'' defining a packet descriptor contains the buffer pointer and the actual Ethernet packet length (in bytes). 28 29 29 The actual TX an RX queues structures depends on the hardware NIC implementation, and are defined by the driver code.30 The actual TX an RX queues structures depends on the hardware NIC implementation, and are only accessed by the driver functions. 30 31 31 32 To access the drivers, the NIC device defines a lower-level "driver" API, containing four command types, that are detailed in section D below.