Changes between Version 22 and Version 23 of almosOnTsarDoc

Timestamp:

Aug 21, 2012, 9:25:09 PM (13 years ago)

Author:

almaless

Comment:

--

almosOnTsarDoc

@@ -43 +43 @@
 }}}
 
-'''Note''': by default you have to source this file from its local directory, that is, you have to be in the ''DISTRIB'' directory.
+'''Note''': by default you have to source this file from its local directory: that is, you have to be in the ''DISTRIB'' directory.
 
 Now, lets go to ''DISTRIB/test/pf1'' and run ''make sim1'':
@@ -58 +58 @@
 The tty0 and tty3 are reserved for the kernel trace and information messages. For a user application, the tty1 represent the stdin and stdout while the tty2 represent the stderr. 
 
-''Sim1'' rule means the simulator of TSAR is configured to one cluster, that is, 4 cores. Using ''sim4'', ''sim16'', ''sim64'' or ''sim128'' lets you start the simulator with (respectively) 4, 16, 64 or 128 clusters of 4 cores each.
+''Sim1'' rule means the simulator of TSAR is configured to one cluster: that is, 4 cores. Using ''sim4'', ''sim16'', ''sim64'' or ''sim128'' lets you start the simulator with (respectively) 4, 16, 64 or 128 clusters of 4 cores each.
 
 '''Note''': although the hardware configuration can be changed at each simulation, there is no need to recompile or regenerate the kernel. The kernel of ALMOS detects the hardware resources at each boot. A user application can get the number of online cores using the standard ''sysconf()'' call (man sysconf).   
@@ -165 +165 @@
 
 == Running without the interactive mode ==
-As you may certainly noticed, the simulation speed is slow. This because the simulator is cycle and bit accurate, that is, the simulation includes the evolution of all hardware FSMs (Finite State Machine), data movements and contentions on all hardware resources at a cycle and bit precision.
+As you may certainly noticed, the simulation speed is slow. This because the simulator is cycle and bit accurate: that is, the simulation includes the evolution of all hardware FSMs (Finite State Machine), data movements and contentions on all hardware resources at a cycle and bit precision.
 
 For a large TSAR configuration starting from ''sim16'' (i.e. 16 x 4 = 64 cores) or even if you just want to launch several instances of the simulator with different configurations, you need to disable the interactive mode in favor of a batch execution mode. This can be done by following 2 steps before running a simulation: