[15] | 1 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% |
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| 2 | %%%%% LIP6 |
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| 3 | % HPC |
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| 4 | @InProceedings{hpc06a, |
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| 5 | author = {{M.B. Gokhale and al.}}, |
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[56] | 6 | title = {{Promises and Pitfalls of Reconfigurable Supercomputing}}, |
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[15] | 7 | booktitle = {Systems and Algorithms, CSREA Press}, |
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| 8 | pages = {11-20}, |
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| 9 | year = {2006}, |
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| 10 | } |
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| 11 | @MISC{hpc06b, |
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| 12 | author = {{D. Buell}}, |
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| 13 | title = {{Programming Reconfigurable Computers}}, |
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| 14 | booktitle = {Summer Institute}, |
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| 15 | howpublished = {http://gladiator.ncsa.uiuc.edu/PDFs/rssi06/presentations/00\_Duncan\_Buell.pdf}, |
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| 16 | year = {2006}, |
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| 17 | } |
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| 18 | @InProceedings{hpc07a, |
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| 19 | author = {{T. Van Court and al.}}, |
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| 20 | title = {{ Achieving High Performance with FPGA-Based Computing}}, |
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| 21 | booktitle = {Computer, vol. 40, no. 3}, |
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| 22 | pages = {50-57}, |
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| 23 | month = {mars}, |
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| 24 | year = {2007}, |
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| 25 | } |
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[56] | 26 | @misc{hpc08, |
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| 27 | title = {Mitrionics}, |
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| 28 | howpublished = {http://www.mitrionics.com/}, |
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| 29 | year = {2009}, |
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| 30 | } |
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| 31 | @misc{hpc09, |
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| 32 | title = {Gidel}, |
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| 33 | howpublished = {http://www.gidel.com/}, |
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| 34 | year = {2009}, |
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| 35 | } |
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| 36 | @misc{hpc10, |
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| 37 | title = {Convey Computer}, |
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| 38 | howpublished = {http://www.conveycomputers.com/}, |
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| 39 | year = {2009}, |
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| 40 | } |
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| 41 | @InProceedings{hpc11, |
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| 42 | author = {E. El-Araby, I. Gonzalez and T. El-Ghazawi}, |
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| 43 | title = {Virtual Architecture and Design Automation for Partial Reconfiguration }, |
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| 44 | booktitle = {HPRCTA}, |
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| 45 | year = {2008}, |
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| 46 | } |
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| 47 | @InProceedings{hpc12, |
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| 48 | author = {{P. Lysaght and J. Dunlop}}, |
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| 49 | title = {Dynamic Reconfiguration of Field Programmable Gate Arrays}, |
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| 50 | booktitle = {Field Programmable Logic and Applications, Oxford, England}, |
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| 51 | month = {Sept}, |
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| 52 | year = {1993}, |
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| 53 | } |
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[15] | 54 | |
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[56] | 55 | |
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[15] | 56 | % System design |
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| 57 | @misc{soclib, |
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| 58 | title = {Soclib}, |
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| 59 | howpublished = {http://www.soclib.fr/}, |
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| 60 | year = {2009}, |
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| 61 | } |
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| 62 | |
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| 63 | @misc{system-generateur-for-dsp, |
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| 64 | title = {{System Generator for DSP}}, |
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| 65 | howpublished = {http://www.xilinx.com/tools/sysgen.htm}, |
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| 66 | year = {2009}, |
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| 67 | } |
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| 68 | |
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| 69 | @misc{spoc-builder, |
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| 70 | title = {{sopc builder support}}, |
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| 71 | howpublished = {http://www.altera.com/support/software/system/sopc/sof-sopc\_builder.html}, |
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| 72 | year = {2009}, |
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| 73 | } |
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| 74 | |
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| 75 | @InProceedings{disydent05, |
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| 76 | author = {{Ivan Aug\'{e}, Fr\'{e}d\'{e}ric P\'{e}trot, François Donnet and Pascal Gomez}}, |
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| 77 | title = {{Platform-based design from parallel C specifications}}, |
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| 78 | booktitle = {IEEE Transaction on CAD of Integrated Circuits and Systems}, |
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| 79 | pages = {1811--1826}, |
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| 80 | month = {December}, |
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| 81 | year = {2005}, |
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| 82 | } |
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| 83 | |
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| 84 | % HLS |
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| 85 | % http://mesl.ucsd.edu/spark/index.shtml |
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| 86 | @BOOK{spark04, |
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| 87 | author = {S. Gupta and al.}, |
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| 88 | title = {SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits}, |
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| 89 | publisher = {Springer}, |
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| 90 | year = {2004}, |
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| 91 | } |
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| 92 | |
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| 93 | @INBOOK{gaut08, |
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| 94 | author = {P. Coussy and al.}, |
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| 95 | title = {GAUT: A High-Level Synthesis Tool for DSP applications}, |
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| 96 | booktitle = {High-Level Synthesis: From Algorithm to Digital Circuits}, |
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| 97 | publisher = {Springer}, |
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| 98 | year = {2008}, |
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| 99 | } |
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| 100 | |
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| 101 | @INBOOK{ugh08, |
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| 102 | author = {Ivan Aug\'{e} and Fr\'{e}d\'{e}ric P\'{e}trot}, |
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| 103 | title = {User Guided High Level Synthesis}, |
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| 104 | booktitle = {High-Level Synthesis: From Algorithm to Digital Circuits}, |
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| 105 | publisher = {Springer}, |
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| 106 | chapter = {10}, |
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| 107 | year = {2008}, |
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| 108 | } |
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| 109 | |
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| 110 | @misc{pico, |
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| 111 | title = {{PICO}}, |
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| 112 | howpublished = {http://www.synfora.com/}, |
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| 113 | year = {2009}, |
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| 114 | } |
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| 115 | |
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| 116 | @misc{catapult-c, |
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| 117 | title = {{CATAPULT-C Mentor HLS tool}}, |
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| 118 | howpublished = {http://www.mentor.com/products/esl/high\_level\_synthesis/}, |
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| 119 | year = {2009}, |
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| 120 | } |
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| 121 | |
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| 122 | @misc{cynthetizer, |
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| 123 | title = {{Forte's CYNTHESIZER}}, |
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| 124 | howpublished = {http://www.forteds.com/}, |
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| 125 | year = {2009}, |
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| 126 | } |
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| 127 | |
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| 128 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% |
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| 129 | %%%%% IRISA |
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| 130 | @InProceedings{KluterCodes08, |
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| 131 | author = {{Theo Kluter and Philip Brisk and Paolo Ienne and and Edoardo Charbon}}, |
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| 132 | title = {{Speculative DMA for Architecturally Visible Storage in Instruction Set Extensions}}, |
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| 133 | booktitle = {ISSS/CODES}, |
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| 134 | year = {2008}, |
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| 135 | } |
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| 136 | |
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| 137 | @InProceedings{KluterDAC09, |
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| 138 | author = {{Theo Kluter and Philip Brisk and Paolo Ienne and and Edoardo Charbon}}, |
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| 139 | title = {{Way Stealing : Cache-assisted Automatic Instruction Set Extensions}}, |
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| 140 | booktitle = {Design Automation Conference (DAC)}, |
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| 141 | year = {2009}, |
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| 142 | } |
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| 143 | |
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| 144 | @InProceedings{YuCodes04, |
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| 145 | author = {{Pan Yu and Tulika Mitra}}, |
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| 146 | title = {{Scalable Custom Instructions Identification for Instruction Set Extensible Processors}}, |
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| 147 | booktitle = {ISSS/CODES}, |
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| 148 | year = {2004}, |
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| 149 | } |
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| 150 | |
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| 151 | @InProceedings{Dinh08, |
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| 152 | author = {{Quang Dinh and Deming Chen and Martin D.~F.~Wong}}, |
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| 153 | title = {{Efficient ASIP Design for Configurable Processors with Fine-Grained Resource Sharing}}, |
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| 154 | booktitle = {ACM Internatibnal Conference Field Programmable Gate Arrays (FPGA)}, |
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| 155 | year = {2008}, |
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| 156 | } |
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| 157 | |
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| 158 | @Misc{NIOS2UG, |
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| 159 | title = {{Nios II Custom Instruction User Guide, Altera Corp.}}, |
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| 160 | year = {2008}, |
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| 161 | } |
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| 162 | |
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| 163 | %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% |
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| 164 | %%% CITI |
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| 165 | @book{Polis, |
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| 166 | author = {Balarin, Felice}, |
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| 167 | publisher = {Kluwer Academic Publishers}, |
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| 168 | title = {Hardware-software co-design of embedded systems : the POLIS |
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| 169 | approach}, |
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| 170 | year = {1997} |
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| 171 | } |
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| 172 | |
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| 173 | @INPROCEEDINGS{Coware, |
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| 174 | author = {Ivo Bolsens and Hugo J. De Man and Bill Lin and Karl Van |
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| 175 | Rompaey and Steven Vercauteren and Diederik Verkest}, |
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| 176 | title = {Hardware/Software Co-Design of Digital Telecommunication Systems}, |
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| 177 | booktitle = {Proceedings of the IEEE}, |
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| 178 | year = {1997}, |
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| 179 | pages = {391--418} |
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| 180 | } |
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| 181 | |
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| 182 | @article{Jantsch, |
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| 183 | author = {Mattias O'Nil and Axel Jantsch}, |
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| 184 | title = {Device Driver and DMA Controller Synthesis from HW/SW |
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| 185 | Communication protocol specifications}, |
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| 186 | journal = {Design Automation for Embedded Systems}, |
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| 187 | year = {2001}, |
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| 188 | volume = {6}, |
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| 189 | pages = {177-205} |
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| 190 | } |
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| 191 | |
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| 192 | @InProceedings{Park01, |
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| 193 | author = {Joonseok Park and Pedro C.~Diniz}, |
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| 194 | title = {Synthesis of Pipelined Memory Access Controllers for Streamed |
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| 195 | Data Applications on {FPGA}-Based Computing Engines}, |
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| 196 | booktitle = {International Symposium on System Synthesis (ISSS)}, |
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| 197 | pages = {221-226}, |
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| 198 | year = {2001}, |
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| 199 | } |
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| 200 | |
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| 201 | @article{FR-vlsi, |
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| 202 | author = {Antoine Fraboulet and Tanguy Risset}, |
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| 203 | title = {Master Interface for On-Chip Hardware Accelerator Burst Communications}, |
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| 204 | journal = {Journal of VLSI Signal Processing}, |
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| 205 | publisher = {Springer Science}, |
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| 206 | year = {2007}, |
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| 207 | volume = {59}, |
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| 208 | pages = {73-85} |
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| 209 | } |
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| 210 | |
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| 211 | @InProceedings{jerraya, |
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| 212 | author = {Sungjoo Yoo and Jerraya Ahmed}, |
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| 213 | title = {Introduction to Hardware Abstraction Layers for SoC}, |
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| 214 | OPTcrossref = {}, |
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| 215 | OPTkey = {}, |
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| 216 | booktitle = {Design, Automation and Test in Europe Conference and Exhibition}, |
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| 217 | pages = {336 -- 337}, |
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| 218 | year = 2003, |
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| 219 | OPTeditor = {}, |
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| 220 | OPTvolume = {}, |
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| 221 | OPTnumber = {}, |
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| 222 | OPTseries = {}, |
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| 223 | OPTaddress = {}, |
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| 224 | OPTmonth = {}, |
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| 225 | OPTorganization = {}, |
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| 226 | OPTpublisher = {}, |
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| 227 | OPTnote = {}, |
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| 228 | OPTannote = {} |
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| 229 | } |
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| 230 | |
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| 231 | @INPROCEEDINGS{FAUST, |
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| 232 | author = {D. Lattard and E. Beigne and C. Bernard and C. Bour and F. |
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| 233 | Clermidy and Y. Durand and J. Durupt and D. Varreau and P. Vivet and |
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| 234 | P. Penard and A. Bouttier and F. Berens}, |
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| 235 | title = "A Telecom Baseband Circuit-Based on an Asynchronous Network-on-Chip", |
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| 236 | pages = {}, |
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| 237 | BOOKTITLE="ISSCC\'2007", |
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| 238 | year = {2007}, |
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| 239 | publisher = {IEEE Computer Society}, |
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| 240 | address = {San Francisco, USA}, |
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| 241 | }; |
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| 242 | |
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| 243 | @inproceedings{JerrayaPetrot, |
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| 244 | author = {Ahmed A. Jerraya and Aimen Bouchhima and Fr\'{e}d\'{e}ric P\'{e}trot}, |
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| 245 | title = {Programming models and HW-SW interfaces abstraction for multi-processor SoC}, |
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| 246 | booktitle = {DAC '06: Proceedings of the 43rd annual conference on Design automation}, |
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| 247 | year = {2006}, |
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| 248 | isbn = {1-59593-381-6}, |
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| 249 | pages = {280--285}, |
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| 250 | location = {San Francisco, CA, USA}, |
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| 251 | publisher = {ACM}, |
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| 252 | address = {New York, NY, USA}, |
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| 253 | } |
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| 254 | |
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| 255 | @inproceedings{mwmr, |
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| 256 | author = {E. Faure and A. Greiner and D. Genius}, |
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| 257 | title = {A generic hardware/software communication mechanism for |
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| 258 | Multi-Processor System on Chip, Targeting Telecommunication Applications}, |
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| 259 | booktitle = {ReCoSoC'06}, |
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| 260 | year = {2006}, |
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| 261 | pages = {237--242}, |
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| 262 | address = {Montpellier, France} |
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| 263 | } |
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| 264 | |
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| 265 | @inproceedings{Alberto, |
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| 266 | author = {Roberto Passerone and |
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| 267 | James A. Rowson and |
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| 268 | Alberto L. Sangiovanni-Vincentelli}, |
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| 269 | title = {Automatic Synthesis of Interfaces Between Incompatible Protocols}, |
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| 270 | booktitle = {DAC}, |
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| 271 | year = {1998}, |
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| 272 | pages = {8-13} |
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| 273 | } |
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| 274 | |
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| 275 | @article{Avnit, |
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| 276 | author = {Karin Avnit and |
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| 277 | Vijay D'Silva and |
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| 278 | Arcot Sowmya and |
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| 279 | S. Ramesh and |
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| 280 | Sri Parameswaran}, |
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| 281 | title = {Provably correct on-chip communication: A formal approach |
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| 282 | to automatic protocol converter synthesis}, |
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| 283 | journal = {ACM Trans. Design Autom. Electr. Syst.}, |
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| 284 | volume = {14}, |
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| 285 | number = {2}, |
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| 286 | year = {2009} |
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| 287 | } |
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| 288 | |
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| 289 | @inproceedings{smith, |
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| 290 | author = {James Smith and |
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| 291 | Giovanni De Micheli}, |
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| 292 | title = {Automated Composition of Hardware Components}, |
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| 293 | booktitle = {DAC}, |
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| 294 | year = {1998}, |
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| 295 | pages = {14-19} |
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| 296 | } |
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| 297 | |
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| 298 | @inproceedings{Narayan, |
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| 299 | author = {Sanjiv Narayan and |
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| 300 | Daniel Gajski}, |
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| 301 | title = {Interfacing Incompatible Protocols Using Interface Process |
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| 302 | Generation}, |
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| 303 | booktitle = {DAC}, |
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| 304 | year = {1995}, |
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| 305 | pages = {468-473} |
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| 306 | } |
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| 307 | |
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| 308 | @TECHREPORT{Ptolemy, |
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| 309 | AUTHOR = { E.A. Lee et al.}, |
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| 310 | INSTITUTION = {University of California, Berkeley}, |
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| 311 | NUMBER = {UCB/ERL No. M99/37}, |
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| 312 | TITLE = {Overview of the Ptolemy Project}, |
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| 313 | YEAR = {1999}, |
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| 314 | MONTH = {july} |
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| 315 | } |
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| 316 | |
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[61] | 317 | @article{syntol, |
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| 318 | author={Paul Feautrier}, |
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| 319 | title={Scalable and Structured Scheduling}, |
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| 320 | journal={Int. J. of Parallel Programming}, |
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| 321 | year=2006, |
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| 322 | month=May, number=5, volume=34, |
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| 323 | pages="459--487" |
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| 324 | } |
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