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source: anr/architecture-csg.fig @ 246

Last change on this file since 246 was 225, checked in by coach, 15 years ago
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File size: 4.4 KB

Rev	Line
[225]	1	#FIG 3.2 Produced by xfig version 3.2.5b
[12]	2	Landscape
	3	Center
	4	Metric
	5	Letter
	6	100.00
	7	Single
	8	-2
	9	1200 2
	10	6 3892 1126 5532 2807
	11	5 1 0 2 0 7 50 -1 -1 0.000 0 1 1 0 4886.631 1711.404 4857 2042 5139 1927 5211 1641
	12	1 1 2.00 57.15 114.30
	13	6 4397 1798 4861 2262
	14	1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 4629 2030 217 217 4412 2030 4846 2030
[21]	15	4 0 0 50 -1 2 12 0.0000 4 150 240 4515 2099 T0\001
[12]	16	-6
	17	6 4217 2372 5192 2732
	18	4 1 0 50 -1 2 16 0.0000 4 195 855 4704 2507 process\001
	19	4 1 0 50 -1 2 16 0.0000 4 195 975 4704 2732 network\001
	20	-6
	21	1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 4214 1427 217 217 3996 1427 4431 1427
	22	1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 5180 1439 217 217 4963 1439 5398 1439
	23	2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
	24	1 1 2.00 57.15 114.30
	25	4997 1427 4425 1427
	26	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 2
	27	3917 2332 5517 2332
	28	2 4 0 2 0 7 50 -1 -1 0.000 0 0 7 0 0 5
	29	5507 2792 3907 2792 3907 1141 5507 1141 5507 2792
[21]	30	4 0 0 50 -1 2 12 0.0000 4 150 240 4139 1498 T1\001
	31	4 0 0 50 -1 2 12 0.0000 4 150 240 5068 1498 T2\001
[12]	32	-6
	33	6 3945 135 5505 890
[21]	34	4 1 0 50 -1 2 14 0.0000 4 165 1275 4725 300 architecture\001
	35	4 1 0 50 -1 2 14 0.0000 4 225 1080 4725 470 parameter\001
[12]	36	4 1 0 50 -1 2 14 0.0000 4 120 135 4715 640 +\001
[21]	37	4 1 0 50 -1 2 14 0.0000 4 225 1650 4725 830 hw/sw mapping\001
[12]	38	-6
	39	6 6525 1070 7895 1580
	40	2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5
	41	6540 1085 7880 1085 7880 1565 6540 1565 6540 1085
	42	4 1 0 50 -1 2 16 0.0000 4 195 585 7220 1415 CSG\001
	43	-6
[225]	44	6 6165 3240 8100 4455
	45	5 1 1 2 0 7 50 -1 -1 4.000 0 1 0 0 7132.500 1087.813 6205 4281 7052 4412 8060 4281
	46	6 6165 3240 8100 4325
	47	6 6528 3544 7697 4325
	48	4 1 0 50 -1 2 13 0.0000 4 148 1142 7106 3722 architecture\001
	49	4 1 0 50 -1 2 13 0.0000 4 202 658 7146 4228 library\001
	50	4 1 0 50 -1 2 13 0.0000 4 202 820 7106 3968 template\001
	51	-6
	52	1 1 1 2 0 7 50 -1 -1 4.000 1 0.0000 7133 3370 927 87 7133 3370 8060 3370
	53	-6
	54	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 3
	55	6205 3370 6205 4281 6205 4195
	56	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 2
	57	8060 3370 8060 4281
	58	-6
	59	6 5715 2115 6885 3015
	60	5 1 1 2 0 7 50 -1 -1 4.000 0 1 0 0 6300.000 1324.603 5739 2886 6251 2983 6861 2886
	61	1 1 1 2 0 7 50 -1 -1 4.000 1 0.0000 6300 2211 561 64 6300 2211 6861 2211
	62	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 3
	63	5739 2211 5739 2886 5739 2822
	64	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 2
	65	6861 2211 6861 2886
	66	-6
	67	6 7110 2025 8640 3105
	68	5 1 1 2 0 7 50 -1 -1 4.000 0 1 0 0 7875.000 723.628 7141 2950 7811 3067 8609 2950
	69	1 1 1 2 0 7 50 -1 -1 4.000 1 0.0000 7876 2140 734 77 7876 2140 8609 2140
	70	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 3
	71	7141 2140 7141 2950 7141 2874
	72	2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 2
	73	8609 2140 8609 2950
	74	-6
	75	6 5895 2295 6660 2835
	76	4 1 0 50 -1 2 14 0.0000 4 165 315 6300 2475 OS\001
	77	4 1 0 50 -1 2 14 0.0000 4 225 735 6285 2745 library\001
	78	-6
[12]	79	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	80	0 0 2.00 120.00 240.00
	81	2932 1922 3912 1922
	82	2 4 0 2 0 7 50 -1 -1 6.000 0 0 7 0 0 5
	83	10365 1595 10365 920 9240 920 9240 1595 10365 1595
	84	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	85	0 0 2.00 120.00 240.00
	86	5625 455 6465 1250
	87	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	88	0 0 2.00 120.00 240.00
	89	5505 1430 6435 1430
	90	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	91	0 0 2.00 120.00 240.00
	92	7890 1220 9195 1220
	93	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	94	0 0 2.00 120.00 240.00
	95	7890 1415 9210 1880
	96	2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5
	97	6510 110 7875 110 7875 545 6510 545 6510 110
	98	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	99	0 0 2.00 120.00 240.00
	100	7200 1085 7200 560
	101	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	102	0 0 2.00 120.00 240.00
	103	6255 2105 6690 1595
	104	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	105	0 0 2.00 120.00 240.00
	106	7695 2120 7575 1595
	107	2 4 0 2 0 7 50 -1 -1 6.000 0 0 7 0 0 5
	108	10335 2290 10335 1840 9210 1840 9210 2290 10335 2290
	109	2 1 1 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	110	0 0 2.00 120.00 240.00
	111	9767 2310 9767 3210
[225]	112	2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2
	113	0 0 2.00 120.00 240.00
	114	7040 3260 7025 1565
[21]	115	4 1 0 50 -1 2 14 0.0000 4 165 1005 9810 1445 bitstream\001
	116	4 1 0 50 -1 2 14 0.0000 4 165 660 9810 1205 FPGA\001
[12]	117	4 1 0 50 -1 2 14 0.0000 4 165 1005 9795 2110 simulator\001
[21]	118	4 1 0 50 -1 2 14 0.0000 4 225 1140 7905 2690 component\001
	119	4 1 0 50 -1 2 14 0.0000 4 165 885 7890 2960 libraries\001
	120	4 1 0 50 -1 2 14 0.0000 4 165 1005 7905 2435 hardware\001
	121	4 1 0 50 -1 2 14 0.0000 4 225 1320 9810 3470 performance\001
	122	4 1 0 50 -1 2 14 0.0000 4 225 825 9810 3770 analysis\001
	123	4 1 0 50 -1 2 16 0.0000 4 195 585 7185 425 HAS\001
[225]	124	4 1 0 50 -1 2 14 0.0000 4 165 720 2259 1852 initilal\001
	125	4 1 0 50 -1 2 14 0.0000 4 225 1185 2259 2152 application\001

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