[21] | 1 | #FIG 3.2 Produced by xfig version 3.2.5 |
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[12] | 2 | Landscape |
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| 3 | Center |
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| 4 | Metric |
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| 5 | Letter |
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| 6 | 100.00 |
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| 7 | Single |
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| 8 | -2 |
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| 9 | 1200 2 |
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| 10 | 6 3892 1126 5532 2807 |
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| 11 | 5 1 0 2 0 7 50 -1 -1 0.000 0 1 1 0 4886.631 1711.404 4857 2042 5139 1927 5211 1641 |
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| 12 | 1 1 2.00 57.15 114.30 |
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| 13 | 6 4397 1798 4861 2262 |
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| 14 | 1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 4629 2030 217 217 4412 2030 4846 2030 |
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[21] | 15 | 4 0 0 50 -1 2 12 0.0000 4 150 240 4515 2099 T0\001 |
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[12] | 16 | -6 |
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| 17 | 6 4217 2372 5192 2732 |
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| 18 | 4 1 0 50 -1 2 16 0.0000 4 195 855 4704 2507 process\001 |
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| 19 | 4 1 0 50 -1 2 16 0.0000 4 195 975 4704 2732 network\001 |
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| 20 | -6 |
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| 21 | 1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 4214 1427 217 217 3996 1427 4431 1427 |
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| 22 | 1 4 0 2 0 7 50 -1 -1 0.000 1 0.0000 5180 1439 217 217 4963 1439 5398 1439 |
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| 23 | 2 1 0 2 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 |
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| 24 | 1 1 2.00 57.15 114.30 |
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| 25 | 4997 1427 4425 1427 |
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| 26 | 2 1 1 2 0 7 50 -1 -1 4.000 0 0 -1 0 0 2 |
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| 27 | 3917 2332 5517 2332 |
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| 28 | 2 4 0 2 0 7 50 -1 -1 0.000 0 0 7 0 0 5 |
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| 29 | 5507 2792 3907 2792 3907 1141 5507 1141 5507 2792 |
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[21] | 30 | 4 0 0 50 -1 2 12 0.0000 4 150 240 4139 1498 T1\001 |
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| 31 | 4 0 0 50 -1 2 12 0.0000 4 150 240 5068 1498 T2\001 |
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[12] | 32 | -6 |
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| 33 | 6 1359 1177 3159 2752 |
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| 34 | 2 4 0 2 0 7 50 -1 -1 6.000 0 0 7 0 0 5 |
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| 35 | 2934 2527 2934 1402 1584 1402 1584 2527 2934 2527 |
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[21] | 36 | 4 1 0 50 -1 2 14 0.0000 4 165 720 2259 1852 initilal\001 |
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[12] | 37 | 4 1 0 50 -1 2 14 0.0000 4 225 1185 2259 2152 application\001 |
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| 38 | -6 |
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| 39 | 6 3945 135 5505 890 |
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[21] | 40 | 4 1 0 50 -1 2 14 0.0000 4 165 1275 4725 300 architecture\001 |
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| 41 | 4 1 0 50 -1 2 14 0.0000 4 225 1080 4725 470 parameter\001 |
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[12] | 42 | 4 1 0 50 -1 2 14 0.0000 4 120 135 4715 640 +\001 |
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[21] | 43 | 4 1 0 50 -1 2 14 0.0000 4 225 1650 4725 830 hw/sw mapping\001 |
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[12] | 44 | -6 |
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| 45 | 6 6255 3275 7905 4205 |
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| 46 | 2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5 |
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| 47 | 6270 3290 7890 3290 7890 4190 6270 4190 6270 3290 |
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[21] | 48 | 4 1 0 50 -1 2 14 0.0000 4 165 1275 7080 3560 architecture\001 |
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| 49 | 4 1 0 50 -1 2 14 0.0000 4 225 915 7080 3815 template\001 |
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[12] | 50 | 4 1 0 50 -1 2 14 0.0000 4 225 735 7125 4085 library\001 |
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| 51 | -6 |
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| 52 | 6 6525 1070 7895 1580 |
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| 53 | 2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5 |
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| 54 | 6540 1085 7880 1085 7880 1565 6540 1565 6540 1085 |
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| 55 | 4 1 0 50 -1 2 16 0.0000 4 195 585 7220 1415 CSG\001 |
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| 56 | -6 |
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| 57 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 58 | 0 0 2.00 120.00 240.00 |
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| 59 | 2932 1922 3912 1922 |
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| 60 | 2 4 0 2 0 7 50 -1 -1 6.000 0 0 7 0 0 5 |
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| 61 | 10365 1595 10365 920 9240 920 9240 1595 10365 1595 |
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| 62 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 63 | 0 0 2.00 120.00 240.00 |
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| 64 | 5625 455 6465 1250 |
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| 65 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 66 | 0 0 2.00 120.00 240.00 |
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| 67 | 5505 1430 6435 1430 |
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| 68 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 69 | 0 0 2.00 120.00 240.00 |
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| 70 | 7890 1220 9195 1220 |
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| 71 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 72 | 0 0 2.00 120.00 240.00 |
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| 73 | 7890 1415 9210 1880 |
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| 74 | 2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5 |
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| 75 | 6510 110 7875 110 7875 545 6510 545 6510 110 |
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| 76 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 77 | 0 0 2.00 120.00 240.00 |
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| 78 | 7200 1085 7200 560 |
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| 79 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 80 | 0 0 2.00 120.00 240.00 |
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| 81 | 6255 2105 6690 1595 |
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| 82 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 83 | 0 0 2.00 120.00 240.00 |
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| 84 | 7695 2120 7575 1595 |
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| 85 | 2 1 0 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 86 | 0 0 2.00 120.00 240.00 |
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| 87 | 7040 3260 7025 1565 |
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| 88 | 2 4 0 2 0 7 50 -1 -1 6.000 0 0 7 0 0 5 |
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| 89 | 10335 2290 10335 1840 9210 1840 9210 2290 10335 2290 |
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| 90 | 2 1 1 2 0 7 50 -1 -1 6.000 0 0 -1 1 0 2 |
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| 91 | 0 0 2.00 120.00 240.00 |
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| 92 | 9767 2310 9767 3210 |
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[21] | 93 | 2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5 |
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| 94 | 7230 2165 8535 2165 8535 3065 7230 3065 7230 2165 |
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| 95 | 2 2 1 2 0 7 50 -1 -1 6.000 0 0 -1 0 0 5 |
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| 96 | 5865 2165 6780 2165 6780 3080 5865 3080 5865 2165 |
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| 97 | 4 1 0 50 -1 2 14 0.0000 4 165 1005 9810 1445 bitstream\001 |
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| 98 | 4 1 0 50 -1 2 14 0.0000 4 165 660 9810 1205 FPGA\001 |
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[12] | 99 | 4 1 0 50 -1 2 14 0.0000 4 165 1005 9795 2110 simulator\001 |
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[21] | 100 | 4 1 0 50 -1 2 14 0.0000 4 225 1140 7905 2690 component\001 |
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| 101 | 4 1 0 50 -1 2 14 0.0000 4 165 885 7890 2960 libraries\001 |
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| 102 | 4 1 0 50 -1 2 14 0.0000 4 165 1005 7905 2435 hardware\001 |
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| 103 | 4 1 0 50 -1 2 14 0.0000 4 165 315 6345 2565 OS\001 |
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| 104 | 4 1 0 50 -1 2 14 0.0000 4 225 735 6330 2835 library\001 |
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| 105 | 4 1 0 50 -1 2 14 0.0000 4 225 1320 9810 3470 performance\001 |
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| 106 | 4 1 0 50 -1 2 14 0.0000 4 225 825 9810 3770 analysis\001 |
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| 107 | 4 1 0 50 -1 2 16 0.0000 4 195 585 7185 425 HAS\001 |
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