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1Microelectronic allows to integrate complicated functions into products, to increase their
2commercial attractivity and to improve their competitivity. Multimedia and communication
3sectors have taken advantage from microelectronics facilities thanks to developpment of
4design methodologies and tools for real time embedded systems. Many other sectors could
5benefit from microelectronics if these methologies and tools are adapted to their features.
6The Non Recurring Engineering (NRE) costs involded in designing and manufacturing an ASIC is
7very high. It costs several milliars of euros for IC factory and several millions to fabricate
8a specific circuit for example a conservative estimate for a 65nm ASIC project is 10 million USD.
9Consequently, it is generally unfeasible to design and fabricate ASICs in
10low volumes and ICs are designed to cover a broad applications spectrum at the cost of
11performance degradation.
12\\
13Today, FPGAs become important actors in the computational domain that was originally dominated
14by microprocessors and ASICs. Just like microprocessors FPGA based systems can be reprogrammed
15on a per-application basis. At the same time, FPGAs offer significant performance benefits over
16microprocessors implementation for a number of applications. Although these benefits are still
17generally an order of magnitude less than equivalent ASIC implementations, low costs
18(500 euros to 10K euros), fast time to market and flexibility of FPGAs make them an attractive
19choice for low-to-medium volume applications.
20Since their introduction in the mid eighties, FPGAs evolved from a simple,
21low-capacity gate array technology to devices (Altera STRATIX III, Xilinx Virtex V) that
22provide a mix of coarse-grained data path units, memory blocks, microprocessor cores,
23on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement
24complex systems like multi-processors platform with application dedicated coprocessors.
25Table~\ref{fpga_market} shows the estimation of FPGA worldwide market in the next years covering
26various application domains. The ``high end'' lines concern only FPGA with high logic capacity able
27to implement complex systems.
28This market is in significant expansion and is estimated to 914\,M\$ in 2012.
29Using FPGA limits the NRE costs to design cost. This boosts the developpment of methodologies
30and tools to automize design and reduce its cost.
31\begin{table}\leavevmode\center
32\begin{tabular}{|l|l|l|l|}\hline
33Segment         & 2010  & 2011  & 2012 \\\hline\hline
34Communications  & 1,867 & 1,946 & 2,096 \\
35High end        & 467   & 511   & 550 \\\hline
36Consumer        & 550   & 592   & 672 \\
37High end        & 53    & 62    & 75 \\\hline
38Automotive      & 243   & 286   & 358 \\
39High end        & -     & -     & - \\\hline
40Industrial      & 1,102 & 1,228 & 1,406 \\
41High end        & 177   & 188   & 207 \\\hline
42Military/Aereo  & 566   & 636   & 717 \\
43High end        & 56    & 65    & 82 \\\hline\hline
44Total FPGA/PLD  & 4,659 & 5,015 & 5,583 \\
45Total High-End  FPGA    & 753   & 826   & 914 \\\hline
46\end{tabular}
47\caption{\label{fpga_market} Gartner estimation of worldwide FPGA/PLD consumption (Millions \$)}
48\end{table}
49\par
50Today, several companies (atipa, blue-arc, Bull, Chelsio, Convey, CRAY, DataDirect, DELL, hp,
51Wild Systems, IBM, Intel, Microsoft, Myricom, NEC, nvidia etc) are making systems where demand
52for very high performance (HPC) primes over other requirements. They tend to use the highest
53performing devices like Multi-core CPUs, GPUs, large FPGAs, custom ICs and the most innovative
54architectures and algorithms. Companies show up in different "traditional" applications and market
55segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC
56emulation and prototyping, Mil/aero etc. HPC market size is estimated today by FPGA providers
57to 214\,M\$.
58This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion
59of FPGA-based solutions is limited by the flow automation. Nowadays, there are neither commercial
60nor free tools covering the whole design process.
61For instance, with SOPC Builder from Altera, users can select and parameterize IP components
62from an extensive drop-down list of communication, digital signal processor (DSP), microprocessor
63and bus interface cores, as well as incorporate their own IP. Designers can then generate
64a synthesized netlist, simulation test bench and custom software library that reflect the hardware
65configuration.
66Nevertheless, SOPC Builder does not provide any facilities to synthesize coprocessors\emph{I
67(Steven) disagree : the C2H compiler bundled with SOPCBuilder does a pretty good job at this} and to
68simulate the platform at a high design level (system C).
69In addition, SOPC Builder is proprietary and only works together with Altera's Quartus compilation
70tool to implement designs on Altera devices (Stratix, Arria, Cyclone).
71PICO [CITATION] and CATAPULT [CITATION] allow to synthesize coprocessors from a C++ description.
72Nevertheless, they can only deal with data dominated applications and they do not handle the
73platform level.
74The Xilinx System Generator for DSP [http://www.xilinx.com/tools/sysgen.htm] is a plug-in to
75Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs.
76Designers can design and simulate a system using MATLAB and Simulink. The tool will then
77automatically generate synthesizable Hardware Description Language (HDL) code mapped to Xilinx
78pre-optimized algorithms.
79However, this tool targets only DSP based algorithms.
80\\
81Consequently, designers developping an embedded system needs to master for example
82SoCLib for design exploration,
83SOPC Builde at the platform level,
84PICO for synthesizing the data dominated coprocessors
85and Quartus for design implementation.
86This requires an important tools interfacing effort and makes the design process very complex
87and achievable only by designers skilled in many domains.
88COACH project integrates all these tools in the same framework masking them to the user.
89The objective is to allow \textbf{pure software} developpers to realize embedded systems.
90\par
91The combination of the framework dedicated to software developpers and FPGA target, allows to gain
92market share over Multi-core CPUs and GPUs HPC based solutions.
93Moreover, one can expect that small and even very small companies will be able to propose embedded
94system and accelerating solutions for standard software applications with acceptable prices, thanks
95 to the elimination of huge hardware investment in opposite to ASIC based solution.
96\\
97This new market may explose like it was done by micro-computing in eighties. This success were due
98to the low cost of first micro-computers (compared to main frame) and the advent of high level
99programming languages that allow a high number of programmers to launch start-ups in software
100engineering.
101
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