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1\anrdoc{Décrire le contexte économique, social, réglementaire
 dans lequel se
2situe le projet en présentant une analyse des enjeux sociaux, économiques,
3environnementaux, industriels
 Donner si possible des arguments chiffrés, par
4exemple, pertinence et portée du projet par rapport à la demande économique
5(analyse du marché, analyse des tendances), analyse de la concurrence,
6indicateurs de réduction de coûts, perspectives de marchés (champs
7d’application, 
). Indicateurs des gains environnementaux, cycle de vie.}
8%
9\subsubsection*{The electronic market}
10\begin{table}\leavevmode\center
11\begin{small}\begin{tabular}{|l|l|l|l|}\hline
12Segment                 & 2010   & 2011    & 2012 \\\hline\hline
13Communications          & 1,867  & 1,946   & 2,096 \\
14High end                & 467    & 511     & 550 \\\hline
15Consumer                & 550    & 592     & 672 \\
16High end                & 53     & 62      & 75 \\\hline
17Automotive              & 243    & 286     & 358 \\
18High end                & -      & -       & - \\\hline
19Industrial              & 1,102  & 1,228   & 1,406 \\
20High end                & 177    & 188     & 207 \\\hline
21Military/Aereo          & 566    & 636     & 717 \\
22High end                & 56     & 65      & 82 \\\hline\hline
23Total FPGA/PLD          & 4,659  & 5,015   & 5,583 \\
24Total High-End  FPGA    & 753    & 826     & 914 \\\hline
25\end{tabular}\end{small}
26\caption{\label{fpga_market} Gartner estimation of worldwide FPGA/PLD consumption (Millions \$)}
27\end{table}
28%
29Microelectronic components allow the integration of complex functions into products, increases
30commercial attractivity of these products and improves their competitivity.
31\cite{rapport-ministere} estimates a 7\% growth of the micro-electronic market until 2015 minimum.
32Multimedia and communication sectors have taken advantage from microelectronics facilities
33thanks to the developpment of design methodologies and tools for embedded systems.
34Unfortunately, the Non Recurring Engineering (NRE) costs involded in the design
35and manufacturing ASICs is very high.
36An IC foundry costs several billions of euros and the fabrication of a specific circuit
37costs several millions. For example a conservative estimate for a 65nm ASIC project is 10
38million USD.C onsequently, it is more and more unaffordable to design and fabricate ASICs for low and medium
39volume markets and the new trend for building the new generation products will be multi processors SoCs and programmable logic for co-processsing.
40\\
41According to a market survey (J-M. Chery, CTO ST Microelectronics at European NanoelectronicsForum 2010), the global growth is 30 Billons\$ between 2009-2013 for multimedia and communication sectors; this is 6 times more than all other domains like security, home automation, health.
42The predominance of market of multimedia and communication sectors results in the fact that they are mainly mass market.
43%
44\subsubsection*{FPGAs and Embedded Systems}
45Today, FPGAs become important in the computational domain that was originally dominated
46by microprocessors and ASICs. Just like microprocessors, FPGA based systems can be reprogrammed
47on a per-application basis. For many applications, FPGAs offer significant performance benefits over
48microprocessors implementation. There is still a performance degradation of one order
49of magnitude versus an equivalent ASIC implementations, but low cost
50(500 euros to 10K euros), fast time-to-market and flexibility of FPGAs make them an attractive
51choice for low-to-medium volume applications.
52Since their introduction in the mid eighties, FPGAs evolved from a simple,
53low-capacity gate array to devices (\altera STRATIX III, \xilinx Virtex V) that
54provide a mix of coarse-grained data path units, memory blocks, microprocessor cores,
55on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement
56complex systems like multi-processors platform with application dedicated coprocessors.
57Table~\ref{fpga_market} shows the estimation of the FPGA worldwide market in the next years in
58various application domains. The ``high end'' lines concern only FPGA with high logic
59capacity for complex system implementations.
60This market is in significant expansion and is estimated to 914\,M\$ in 2012.
61%The HPC market size is estimated today by FPGA providers at 214\,M\$.
62%Using FPGA limits the NRE costs to the design cost.
63%This boosts the developpment of automatic design tools and methodologies.
64%
65\subsubsection*{FPGAs and High Performance Computing}
66Today, several companies (Atipa, blue-arc, Bull, Chelsio, Convey, CRAY, DataDirect, DELL, hp,
67Wild Systems, IBM, Intel, Microsoft, Myricom, NEC, nvidia etc) are making systems where demand
68for very high performance (HPC) primes over other requirements. They tend to use the highest
69performing devices like Multi-core CPUs, GPUs, large FPGAs, custom ICs and the most innovative
70architectures and algorithms. These companies show up in different "traditional" applications and market
71segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC
72emulation and prototyping, military/aereo etc. The HPC market size is estimated today by FPGA providers
73at 214\,M\$.
74This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion
75of FPGA-based solutions is limited by the lack of design automation.
76%
77\subsubsection*{Evolution of architectures}
78Nowadays processors mixing core and programmable matrix are available on the market (eg. Intel ATOM E600C).
79Donald Newell, AMD technical manager, envisions that such circuits will be at the heart of most of the electronic
80products (eg. PDAs and nomad items) and even personal computers.
81To take benefit of such architecture, developping and deploying application will require innovative codesign methods and tools.
82
83%
84\subsubsection*{COACH's contribution to this evolution}
85Nowadays, there are no commercial or academic tools covering the whole design flow
86from the system level specification to the bitstream generation neither for embedded system design
87nor for HPC.
88\begin{center}\begin{minipage}{.9\linewidth}\textit{
89The aim of the COACH project is to integrate all these design steps into a single design framework
90and to allow \textbf{pure software} developpers to design embedded systems.
91}\end{minipage}\end{center}
92%
93The COACH project proposes an open-source framework for mapping multi-tasks software applications
94on Field Programmable Gate Array circuits (FPGA).
95It aims to propose solutions to the societal/economical challenges by
96providing SMEs novel design capabilities enabling them to increase their
97design productivity with design exploration and synthesis methods that are placed on top
98of the state-of-the-art methods.
99We believe that the combination of a design environment dedicated to software developpers
100and FPGA targets,
101will allow small and even very small companies to propose embedded system and accelerating solutions
102for standard software applications with attractive and competitive prices.
103This new market may explode in the same way as the micro-computer market in the eighties,
104whose success was due to the low cost of the first micro-processors (compared to main frames)
105and the advent of high level programming languages which allowed a high number of programmers
106to launch start-ups in software engineering.
107\\
108So this may increase the total amount of engineers working in this domain: today in France the total is only 26,000 in which 16,000 in big companies \cite{rapport-ministere}.
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