source: anr/task-1.tex @ 225

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1\begin{taskinfo}
2\let\UPMC\leader
3\let\ALL\enable
4\end{taskinfo}
5%
6\begin{objectif}
7This task deals with the main features of digital systems.
8Its objectives are the specification of the designer input, the
9definition of the hardware architectural templates and of all the features
10that the HAS tools will share.
11\end{objectif}
12%
13\begin{workpackage}
14\subtask This \ST specifies the COACH environment for the system designer. At this
15    level the COACH framework is a black box. The deliverables are documents
16    specifying: how to feed COACH (the inputs), how to use COACH (the design flow),
17    what is generated (the outputs).
18    %(definition of the generic architecture of the
19    %MPSoC and its 3 targets hardware mapping).
20    \begin{livrable}
21    \itemV{0}{6}{d}{\Supmc}{COACH specification} \setMacroInAuxFile{specGenManualI}
22        The first version of the COACH specification.
23        This document contains the general description of the framework, the design flow and the
24        description of the architectural templates.
25        It refers to the HAS specification (deliverable {\specHasManual}) and
26        to the CSG specifcation (deliverable \specCsgManual) for the COACH input
27        descriptions.
28    \itemL{6}{12}{d}{\Supmc}{COACH specification}{1:0:0} \setMacroInAuxFile{specGenManual}
29        The final version of the {\specGenManualI} deliverable updated with the first
30            feed-backs of the demonstrator \STs.
31    \itemV{0}{6}{d}{\Stima}{CSG specification} \setMacroInAuxFile{specCsgManualI}
32        The first version of the CSG (COACH System Generator) specification.
33        It specifies how the task graph is described, the communication schemes and its
34        associated API (Application  Programming Interface).
35        The base is the SRL library and the MWMR communication component defined by the SocLib
36        ANR project.
37        Nevertheless, these basic schemes will be enhanced to allow more efficient
38        synthesis.
39    \itemL{6}{12}{d}{\Stima}{CSG specification}{1:0:0} \setMacroInAuxFile{specCsgManual}
40        The final version of the {\specGenManualI} deliverable updated with the first
41            feed-backs of the demonstrator \STs.
42    \itemV{0}{6}{d}{\Subs}{HAS specification} \setMacroInAuxFile{specHasManualI}
43        The first version of the HAS (Hardware Accelerator Synthesis) specification.
44        It specifies how tasks must be written (C/C++ subset) and how
45        communication schemes defined in the {\specCsgManual} deliverable must be described for
46        coprocessor synthesis.
47    \itemL{6}{12}{d}{\Subs}{HAS specification}{2:0:0} \setMacroInAuxFile{specHasManual}
48        The final version of the {\specGenManualI} deliverable updated with the first
49            feed-backs of the demonstrator \STs.
50    \end{livrable}
51\subtask This \ST specifies the software COACH structure. The deliverable is a
52    document listing all the COACH software components and how they cooperate.
53    \begin{livrable}
54      \CoutHorsD{0}{12}{\Sthales}{User specification}{1:0:0}
55    \itemL{0}{6}{d}{\Supmc}{COACH internal \ganttlf software architecture}{1:0:0}
56        Description of the software list and the data flow among the tools.
57    \end{livrable}
58\subtask This \ST specifies the \xcoach and the \xcoachplus formats.
59    \begin{livrable}
60    \itemV{0}{6}{d+x}{\Slip}{\xcoach format specification}
61        \setMacroInAuxFile{specXcoachDocI}
62        First release of the XML specification of the \xcoach format (DTD)
63        and its associated documentation allowing to start HLS tools development.
64    \itemV{6}{12}{d+x}{\Slip}{\xcoach format specification}
65        \setMacroInAuxFile{specXcoachDocII}
66        Second release of XML specification of the \xcoach format
67        taking into account the corrections and modifications that the
68        developers of HAS tools suggested.
69    \itemL{12}{18}{d+x}{\Slip}{\xcoach format specification}{7:3:0}
70        \setMacroInAuxFile{specXcoachDoc}
71        Last release of XML specification of the \xcoach format enhanced with
72        the expression of loop potential parallelism.
73    \itemV{6}{12}{x}{\Subs}{First release of C2X}
74        \setMacroInAuxFile{specXcoachToCAI}
75        A GCC plugin C2X that generates a \xcoach description
76        (defined in {\specXcoachDocI} deliverable) from a C/C++ task description
77        (defined in {\specHasManual} deliverable).
78    \itemL{12}{18}{x}{\Subs}{C2X tool}{2:1:0}
79        \setMacroInAuxFile{specXcoachToCA}
80         An updated version of C2X (\specXcoachToCAI) which supports the \xcoach format defined
81        in the {\specXcoachDoc} deliverable and the HAS input format defined in the {\specHasManual}
82        deliverable.
83    \itemV{7}{12}{x}{\Subs}{First release of X2C}
84        \setMacroInAuxFile{specXcoachToCBI}
85        This second tool X2C regenerates a C description from a \xcoach
86        description.
87    \itemL{12}{18}{x}{\Subs}{X2C tool}{2:1:0}
88        \setMacroInAuxFile{specXcoachToCB}
89        The same software as the former (\specXcoachToCBI) but for the \xcoach format as defined
90        in the {\specXcoachDoc} deliverable and HAS input as defined in the {\specHasManual}
91        deliverable.
92    \itemV{12}{18}{x}{\Supmc}{First release of X2SC}
93        \setMacroInAuxFile{specXcoachToSystemCI}
94        The first release of the software tool X2SC  that translates \xcoachplus description to CABA
95        and TLM-DT SystemC module.
96    \itemL{18}{24}{x}{\Supmc}{X2SC tool}{0:2:0}
97        \setMacroInAuxFile{specXcoachToSystemC}
98        Final release of the former software (\specXcoachToSystemCI).
99    \itemV{12}{18}{x}{\Subs}{First release of the X2VHDL}
100        \setMacroInAuxFile{specXcoachToVhdlI}
101        The first release of the software tool X2VHDL that translates \xcoachplus description to
102        synthesizable VHDL description.
103    \itemL{18}{24}{x}{\Subs}{X2VHDL tool}{0:3:0}
104        \setMacroInAuxFile{specXcoachToVhdl}
105        Final release of the former software (\specXcoachToVhdlI) and integration
106        of enhancements proposed in \novers{\specXilinxOptimization} deliverable.
107    \itemL{18}{21}{d}{\Sxilinx}{\xilinx RTL optim. (1)}{0:3:0}
108        \setMacroInAuxFile{specXilinxOptimization}
109        This deliverable consists in optimizing the VHDL generated from \xcoachplus format
110        (deliverable \novers{\specXcoachToVhdl}) to the \xilinx RTL synthesis tools.
111        \ubs will provide several examples of VHDL source files generated from \xcoachplus,
112        with explanations about generation process of main data structures used in VHDL sources,
113        \xilinx will provide back a documentation listing that proposes VHDL generation enhancements.
114    \end{livrable}
115   
116\subtask This \ST aims to define a tool in order to pilot the GCC/xcoach compiler.
117    \begin{livrable}
118    \itemL{0}{3}{d}{\Subs}{GCC driver specification}{1:0:0}
119        Specification of the GCC driver tool.
120    \itemV{3}{9}{x}{\Subs}{GCC driver}
121        First release of the GCC driver tool.
122        %en T0+18 car va peut etre evoluer en fonction du DSE µ-archi
123    \itemL{9}{12}{x}{\Subs}{GCC driver}{3:0:0}
124        Final release of the GCC driver tool.
125    \end{livrable}
126
127\subtask Backend HLS tools use a characterized macro-cell library to build the
128    micro-architecture of a coprocessor. The characterisation of a cell depends
129    on the target device. The role of this \ST is to define the macro-cells and
130    to provite a tool that characterizes them automatically by synthesizing them
131    and by extracting their delays. This is done by using RTL synthesis.
132    \begin{livrable}
133    \itemL{0}{6}{d}{\Subs}{Macro-cell definition}{1:0:0}
134        \setMacroInAuxFile{specMacroCell}
135        Definition of the macro cells and the file format describing them.
136    \itemL{6}{12}{x}{\Subs}{Macro-cell library generator}{2:0:0}
137        Final release of the software tool that generates automatically the characterized macro-cell library
138        for a FPGA device.
139    \end{livrable}
140\end{workpackage}
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