source: anr/task-1.tex @ 67

\begin{taskinfo}
\let\UPMC\leader
\let\ALL\enable
\end{taskinfo}
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\begin{objectif}
This task deals with the main features for embedded systems.
Its objectives are the specification of the designer input, the
definition of the hardware architectural templates and all the features
that the HAS tools share.
\end{objectif}
%
\begin{workpackage}
\item This \ST specifies COACH for the system designer. At this
    level COACH is a black box. The deliverables are documents allowing the system
    designers to use COACH: feeding it (inputs), how to use it (design flow),
    what COACH can generate (definition of the generic architecture of the
    MPSoC and its 3 targets hardware mapping).
    \begin{livrable}
    \itemV{0}{6}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManualI}
        It is the first milestone of the COACH user manual that will allow the demonstrator
        \STs to start.
        It contains the general description of the framework, the design flow and the
        description of the architectural templates.
        It refers to the HAS user manual (delivrable {\specHasManual}) and 
        to the CSG manual (delivrable \specCsgManual) for the COACH input
        descriptions.
    \itemL{6}{12}{d}{\Supmc}{COACH user manual}{1:0:0} \setMacroInAuxFile{specGenManual}
        The COACH user manual of the {\specGenManualI} delivrable updated with the feed-backs
        of the demonstrator \STs.
    \itemV{0}{6}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManualI}
        It is the first milestone of the CSG (COACH System Generator) user manual that
                will allow the demonstrator \STs to start.
        It specifies how the task graph is described, the communication schemes and its
        associated API (Application  Programming Interface).
        The base is the SRL library and the MWMR communication component defined by the SocLib
        ANR project.
        Nevertheless, these basic schemes will be enhanced to allow more efficient
        synthesis.
    \itemL{6}{12}{d}{\Stima}{CSG user manual}{1:0:0} \setMacroInAuxFile{specCsgManual}
        The CSG user manual of the {\specGenManualI} delivrable updated with the feed-backs
        of the demonstrator \STs.
    \itemV{0}{6}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManualI}
        It is the first milestone of the HAS (Hardware Accelerator Synthesis) user manual that
                will allow the demonstrator \STs to start.
        It specifies how tasks must be written (C/C++ subset) and how
        communication schemes defined in the {\specCsgManual} delivrable must be described for
        coprocessor synthesis.
    \itemL{6}{12}{d}{\Subs}{HAS user manual}{0:0:0} \setMacroInAuxFile{specHasManual}
        The HAS user manual of the {\specGenManualI} delivrable updated with the feed-backs of
        the demonstrator \STs.
    \end{livrable}
\item This \ST specifies the software COACH structure. The deliverable is a
    document listing all the COACH software components and how they cooperate.
    \begin{livrable}
    \itemL{0}{6}{d}{\Supmc}{decription of \ganttlf software architecture}{1:0:0}
        It contains the software list and the data flow among them.
    \end{livrable}
\item This \ST specifies the \xcoach format.
    \begin{livrable}
    \itemV{0}{6}{d+x}{\Slip}{specification of \xcoach format}
        \setMacroInAuxFile{specXcoachDocI}
        First release of the XML specification of the \xcoach format (DTD)
        and its associated documentation allowing to start HLS tools development.
    \itemV{6}{12}{d+x}{\Slip}{specification of \xcoach format}
        \setMacroInAuxFile{specXcoachDocII}
        Second release of XML specification of the \xcoach format
        taking into account the corrections and modifications that the
        developers of HAS tools suggested.
    \itemL{12}{18}{d+x}{\Slip}{specification of \xcoach format}{0:0:0}
        \setMacroInAuxFile{specXcoachDoc}
        Last release of XML specification of the \xcoach format enhanced with
        the expression of loop potential parallelism.
    \itemV{6}{12}{x}{\Subs}{C++ to/from \xcoach format (1)}
        \setMacroInAuxFile{specXcoachToCAI}
        Proposition of a GCC plugin that generates a \xcoach description
        (defined in {\specXcoachDocI} deliverable) from a C++ task description
        (defined in {\specHasManual} deliverable).
    \itemL{12}{18}{x}{\Subs}{C++ to/from \xcoach format (1)}{0:0:0}
        \setMacroInAuxFile{specXcoachToCA}{::}
        The same software as the former (\specXcoachToCAI) but for \xcoach format defined
        in the {\specXcoachDoc} deliverable and HAS input defined in the {\specHasManual}
        deliverable.
    \itemV{7}{12}{x}{\Subs}{C++ to/from \xcoach format (2)}
        \setMacroInAuxFile{specXcoachToCBI}
        This second tool regenerates a C description from a \xcoach
        description.
    \itemL{12}{18}{x}{\Subs}{C++ to/from \xcoach format (2)}{0:0:0}
        \setMacroInAuxFile{specXcoachToCB}
        The same software as the former (\specXcoachToCBI) but for the \xcoach format as defined
        in the {\specXcoachDoc} deliverable and HAS input as defined in the {\specHasManual}
        deliverable.
    \itemV{12}{18}{x}{\Supmc}{\xcoachplus format to SystemC}
        \setMacroInAuxFile{specXcoachToSystemCI}
        The first release of a program that translates \xcoachplus description to CABA
        and TLM-DT SystemC module.
    \itemL{18}{24}{x}{\Supmc}{\xcoachplus format to SystemC}{0:2:0}
        \setMacroInAuxFile{specXcoachToSystemC}
        Maintenance work of the former software (\specXcoachToSystemCI).
    \itemV{12}{18}{x}{\Subs}{\xcoachplus format to VHDL}
        \setMacroInAuxFile{specXcoachToVhdlI}
        The first release of a program that translates \xcoachplus description to
        synthesizable VHDL description.
    \itemL{18}{24}{x}{\Subs}{\xcoachplus format to VHDL}{0:0:0}
        \setMacroInAuxFile{specXcoachToVhdl}
        Maintenance work of the former software (\specXcoachToVhdlI).
    \end{livrable}
\item Backend HLS tools use a characterized macro-cell library to build the
    micro-architecture of a coprocessor. The characterisation of a cell depends
    on the target device. The role of this \ST is to define the macro-cells and
    to provite a tool that characterizes them automatically by synthesizing them
    and by extracting their delays. This is done by using RTL synthesis.
    \begin{livrable}
    \itemL{0}{6}{d}{\Subs}{macro-cell definition}{0:0:0}
        The document define the macro cell and the file format describing them.
    \itemL{6}{12}{x}{\Subs}{macro-cell library generator}{0:0:0}
        A program that generates automatically the characterized macro-cell library
        for a FPGA device.
    \end{livrable}
\end{workpackage}