source: anr/task-3.tex @ 68

Last change on this file since 68 was 52, checked in by coach, 15 years ago

IA: modification des macros livrable & sortie des tableaux de ressources.

File size: 2.2 KB
Line 
1\begin{taskinfo}
2\let\LIP\leader
3\let\IRISA\enable
4\end{taskinfo}
5%
6\begin{objectif}
7The objective of this task is to convert the input specification of
8an hardware accelerator, which must be written in a familiar language
9(C/C++) with as few constraints as possible, into a form suitable for
10the HLS tools. If the target is an ASIP, the frontend has to extract
11patterns from the source code and convert them into the definition
12of an extensible processor. If the target is a process network, the
13front end has to distribute the workload and the data sets as fairly
14as possible, identify communication channels, and output an \xcoach
15description.
16\end{objectif}
17%
18\begin{workpackage}
19  \item Extraction de motifs et regénération au format COACH annoté
20    \mustbecompleted{FIXME:IRISA ........}
21    \begin{livrable}
22      \itemV{0}{18}{d}{\Sirisa}{Interation manuelle des motifs}
23        \mustbecompleted{FIXME .....}
24      \itemL{18}{24}{d}{\Sirisa}{Integration manuelle des motifs}{0:0:0}
25        \mustbecompleted{FIXME ......}
26    \end{livrable}
27  \item \mustbecompleted{FIXME: la liste des ST est dans wp.txt}
28    \begin{livrable}
29        \itemL{0}{18}{d}{\Sirisa}{Intégration manuelle des motifs}{0:0:0}
30        \mustbecompleted{FIXME ......}
31    \end{livrable}
32  \item Extraction of parallelism in polyhedral loops and conversion into a process network.
33   \begin{livrable}
34    \itemV{0}{6}{d}{\Slip}{Method, Preliminary Definition}
35      Description of the process network construction method. User manual.
36    \itemL{30}{36}{d}{\Slip}{Method}{0:0:0}
37      Final assessment of the method and improved version of the user manual.
38    \itemV{6}{12}{x}{\Slip}{Process Construction)}
39      Preliminary implementation in the Syntol framework.  At this step the sofware will
40      just implement a single constructor.
41    \itemV{12}{24}{x}{\Slip} {Arrays and FIFO}
42      Implementation of the array contraction and FIFO construction algorithm. Conversion
43      of the imput and output to the \xcoach format.
44    \itemL{24}{30}{x}{\Slip} {Process ans FIFO Construction} {0:0:0}
45      Final release taking into account the feedbacks from the demonstrator \STs.
46   \end{livrable}
47\end{workpackage}
48   
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