1 | \begin{taskinfo} |
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2 | \let\LIP\leader |
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3 | \let\IRISA\enable |
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4 | \end{taskinfo} |
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5 | % |
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6 | \begin{objectif} |
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7 | The objective of this task is to convert the input specification of |
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8 | an hardware accelerator, which must be written in a familiar language |
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9 | (C/C++) with as few constraints as possible, into a form suitable for |
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10 | the HLS tools. If the target is an ASIP, the frontend has to extract |
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11 | patterns from the source code and convert them into the definition |
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12 | of an extensible processor. If the target is a process network, the |
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13 | front end has to distribute the workload and the data sets as fairly |
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14 | as possible, identify communication channels, and output an \xcoach |
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15 | description. |
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16 | \end{objectif} |
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17 | % |
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18 | \begin{workpackage}{D3} |
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19 | \item Extraction de motifs et regénération au format COACH annoté |
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20 | \mustbecompleted{FIXME:IRISA ........} |
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21 | \begin{livrable} |
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22 | \item{V1}{0}{18}{d}{\Sirisa}{Interation manuelle des motifs} \mustbecompleted{FIXME .....} |
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23 | \item{VF}{18}{24}{d}{\Sirisa}{Integration manuelle des motifs} \mustbecompleted{FIXME ......} |
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24 | \end{livrable} |
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25 | \item \mustbecompleted{FIXME: la liste des ST est dans wp.txt} |
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26 | \begin{livrable} |
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27 | \item{V1}{0}{18}{d}{\Sirisa}{Intégration manuelle des motifs} \mustbecompleted{FIXME ......} |
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28 | \end{livrable} |
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29 | \item Extraction of parallelism in polyhedral loops and conversion into a process network. |
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30 | \begin{livrable} |
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31 | \item{V1}{0}{6}{d}{\Slip}{Method, Preliminary Definition} |
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32 | Description of the process network construction method. User manual. |
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33 | \item{VF}{30}{36}{d}{\Slip}{Method} |
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34 | Final assessment of the method and improved version of the user manual. |
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35 | \item{V1}{6}{12}{x}{\Slip}{Process Construction)} |
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36 | Preliminary implementation in the Syntol framework. At this step the sofware will |
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37 | just implement a single constructor. |
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38 | \item{V2}{12}{24}{x}{\Slip} {Arrays and FIFO} |
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39 | Implementation of the array contraction and FIFO construction algorithm. Conversion |
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40 | of the imput and output to the \xcoach format. |
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41 | \item{VF}{24}{30}{x}{\Slip} {Process ans FIFO Construction} |
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42 | Final release taking into account the feedbacks from the demonstrator \STs. |
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43 | \end{livrable} |
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44 | \end{workpackage} |
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45 | |
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46 | |
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47 | |
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