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source:
anr
@
148
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| obsolete | 21 | 15 years | |||
| lettres | 128 | 15 years | |||
| wp.txt | 12.9 KB | 9 | 15 years | WP après la réunion du 3 dec 2009 | |
| wp-IRISA.pdf | 41.2 KB | 5 | 15 years | ||
| task-7.tex | 3.4 KB | 143 | 15 years | IA: upadted Xilinx data | |
| task-6.tex | 9.5 KB | 146 | 15 years | IA: fixed incoherence beetween Navtel gantt & table | |
| task-5.tex | 6.4 KB | 144 | 15 years | IA: merged 3 HPC subtask in a single task | |
| task-4.tex | 6.2 KB | 143 | 15 years | IA: upadted Xilinx data | |
| task-3.tex | 4.6 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| task-2.tex | 7.3 KB | 143 | 15 years | IA: upadted Xilinx data | |
| task-1.tex | 7.9 KB | 126 | 15 years | OM modification pendant la réunion du 10 février | |
| task-0.tex | 2.5 KB | 130 | 15 years | TIMA: MAJ des tables, OK vis à vis ANR | |
| table_lip_short.tex | 448 bytes | 122 | 15 years | table bugs | |
| table_lip_full.tex | 694 bytes | 122 | 15 years | table bugs | |
| section-7.tex | 12.1 KB | 143 | 15 years | IA: upadted Xilinx data | |
| section-6.2.tex | 1.4 KB | 140 | 15 years | IA: maj de thales description + maj | |
| section-6.1.tex | 17.3 KB | 142 | 15 years | IA: corrected misspellings in thales description | |
| section-5.tex | 7.6 KB | 136 | 15 years | IA: added Indusrial Interest sub section | |
| section-4.4.tex | 5.2 KB | 147 | 15 years | IA: added the list of all the delivrables | |
| section-4.2.tex | 3.8 KB | 133 | 15 years | Paul: Consortium agreement | |
| section-4.1.tex | 7.4 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| section-3.2.tex | 5.4 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| section-3.1.tex | 14.7 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| section-2.tex | 6.8 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| section-2.2.tex | 8.2 KB | 135 | 15 years | IA: fixed references | |
| section-2.1.tex | 7.5 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| section-1.tex | 8.7 KB | 134 | 15 years | IA: fixed mutek, altera, xilinx, and neutal architectural template | |
| README | 821 bytes | 75 | 15 years | modification pour permettre la génération automatique des tables … | |
| Makefile | 1.6 KB | 147 | 15 years | IA: added the list of all the delivrables | |
| logo-anr.pdf | 6.0 KB | 117 | 15 years | ||
| gantt.l | 30.5 KB | 147 | 15 years | IA: added the list of all the delivrables | |
| flow.fig | 6.6 KB | 1 | 15 years | creation | |
| dependence-task-h.fig | 2.1 KB | 99 | 15 years | IA: 1) mise en page et verification de 2, 2.1, 2.2 4.1. 2) entrer … | |
| ARPEGE-2010-Modele-Document-scientifique.doc | 128.0 KB | 13 | 15 years | ||
| ARPEGE-2010-Appel-A-Projet.pdf | 238.8 KB | 13 | 15 years | ||
| architecture-hpc.fig | 2.6 KB | 21 | 15 years | ||
| architecture-hls.fig | 3.3 KB | 21 | 15 years | ||
| architecture-csg.fig | 3.8 KB | 21 | 15 years | ||
| anr.tex | 17.3 KB | 148 | 15 years | IA: fixed title page | |
| anr.sty | 7.0 KB | 123 | 15 years | IA: 1) enter thales + zied 2) m.a.p | |
| anr.bib | 24.6 KB | 135 | 15 years | IA: fixed references | |
| .texlipse | 201 bytes | 2 | 15 years | Modified state of the art section for ASIP synthesis | |
| .project | 517 bytes | 2 | 15 years | Modified state of the art section for ASIP synthesis | |
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