Changeset 100
- Timestamp:
- Feb 8, 2010, 8:21:22 AM (15 years ago)
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anr/section-1.tex
r99 r100 35 35 The COACH environment will integrate several hardware and software technologies: 36 36 \begin{description} 37 \item[Design Space Exploration ]37 \item[Design Space Exploration:] 38 38 The COACH environment will support design space exploration to help the 39 39 system designer to select and parameterize the target architecture, and to … … 43 43 These criteria will be evaluated by using the SoCLib virtual prototyping infrastructure 44 44 and high-level estimation methodologies. 45 \item[Hardware Accelerators Synthesis (HAS) ]45 \item[Hardware Accelerators Synthesis (HAS):] 46 46 COACH will allow the automatic generation of hardware accelerators when required. 47 47 Hence, High-Level Synthesis (HLS) tools, Application Specific Instruction Processor … … 53 53 The HLS tools of COACH will support a common language and coding style to avoid 54 54 re-engineering by the designer. 55 \item[Platform based design ]55 \item[Platform based design:] 56 56 COACH will handle both \altera and \xilinx FPGA devices. 57 57 COACH will define architectural templates that can be customized by adding … … 70 70 Moreover, the specification of the application will be independant of both the 71 71 architectural template and the target FPGA device. 72 \item[Hardware/Software communication middleware ]72 \item[Hardware/Software communication middleware:] 73 73 Coach will implement an homogeneous HW/SW communication infrastructure and 74 74 communication APIs (Application Programming Interface), that will be used for … … 96 96 The COACH project does not start from scratch. 97 97 It stronly relies on SoCLib virtual prototyping platform~\cite{soclib} for prototyping, 98 99 \mustbecompleted{FIXME == SUPPRIMER LE H de Mutek ???} 98 100 (DSX, component library), operating systems (MutekH, DNA/OS). 99 101 It also leverages on several existing technologies:
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