Index: anr/task-6.tex
===================================================================
--- anr/task-6.tex	(revision 114)
+++ anr/task-6.tex	(revision 123)
@@ -14,5 +14,5 @@
 %
 \begin{workpackage}
-  \item This \ST relies to the COACH use by \bull.
+  \subtask This \ST relies to the COACH use by \bull.
     \mustbecompleted{FIXME:BULL ajouter quelques lignes pour donner
     1) type d'application (HPC ou embedded system, HLS),
@@ -30,5 +30,113 @@
         describing the result of the experimentations.
     \end{livrable}
-  \item This \ST relies to the COACH use by \navtel.
+
+  \subtask The objective of this sub-task is to specify the application and to develop the
+    high level code. The application is in the domain of surveillance of critical
+    infrastructures.
+    The objective is to detect and classify the presence of humans in the restricted area.
+    The algorithm is based on the work of Viola and Jones\cite{thales-viola}.
+    It implements in particular a cascade of classifiers operating on Haar like features,
+    where simple weak classifiers at the beginning of the cascade reject a majority of
+    void sub-windows, before more complex classifiers concentrate on potential regions of
+    interest.
+    This application is computation intensive and also makes an intensive use of binary
+    decision trees to cascade the filters, which makes it a good candidate to assess the
+    association of CAL with parallelizing tools.\\
+    Moreover, the higher levels of computing can involve tracking and data fusion between
+    several camera streams and some other informations.
+    The targeted system will be composed of one camera connected to a PC.
+    All the computing part of the application is executed on a FPGA board connected to the
+    PC.
+    \begin{livrable}
+      \itemV{0}{6}{d}{\Sthales}{\thales demonstrator (step 1)}
+        \setMacroInAuxFile{trtAppSpecification}
+        This delivrable is a document that specifies the application.
+      \itemL{6}{12}{x}{\Sthales}{\thales demonstrator (step 1)}{6:0:0}
+        This delivrable is the code of the application spcecified former
+        delivrable (\trtAppSpecification).
+    \end{livrable}
+
+  \subtask \TRT will use its internal software environment tool SPEAR DE to describe the
+    application. The tool is able to partition and to generate the code for the target. \\
+    In this task, we will adapt SPEAR DE to generate the application description input of
+    COACH framework. We will also describe the three templates of architecture in order to
+    be able to partition the application on the architecture.
+    \begin{livrable}
+      \itemL{6}{18}{x}{\Sthales}{SPEAR-DE adaptation}{6:6:0}
+        \setMacroInAuxFile{trtSpearde}
+        Adaptation of SPEAR-DE for COACH framework.
+    \end{livrable}
+
+  \subtask 
+    abbbaaa
+    \begin{livrable}
+      \itemL{6}{18}{x}{\Sthales}{SPEAR-DE adaptation}{6:6:0}
+        \setMacroInAuxFile{trtSpearde}
+        bbbb Adaptation of SPEAR-DE for COACH framework.
+    \end{livrable}
+
+  \subtask 
+    In this task, \TRT will evaluate the COACH platform. In particular, \TRT will verify
+    its ability to generate a whole VHDL of an embedded system on FPGA for an application
+    mixing control and data flow aspects. \TRT will evaluate the performance of the
+    generated system in terms of GOPS, and the design time from a high level description.
+    \begin{livrable}
+      \itemV{18}{24}{d+x}{\Sthales}{\thales demonstrator (step 2)}
+        This delivrable is a document describing the result got for the application
+        (\trtAppSpecification) with SPEAR-DE (\trtSpearde) using COACH milestone of T0+18.
+        The updated code of the application will be also provide.
+      \itemV{24}{30}{d+x}{\Sthales}{\thales demonstrator (step 2)}
+        This delivrable is a document describing the result got for the application
+        (\trtAppSpecification) with SPEAR-DE (\trtSpearde) using COACH milestone of T0+24.
+        The updated code of the application will be also provide.
+      \itemL{30}{36}{d+x}{\Sthales}{\thales demonstrator (step 2)}{0:6:6}
+        This delivrable is a document that validates and evaluates COACH (final release)
+        for the \thales demonstrators (\trtAppSpecification).
+        The updated code of the application will be also provide.
+    \end{livrable}
+
+  \subtask FLEXRAS proposes a SoC architecture integrating an embedded FPGA (eFPGA).
+    The architecture is composed essentially of a processor, a bus and several RAMs.
+    The embedded FPGA is connected to the bus and communicates with the other components.
+    The (eFPGA) works in 2 modes:
+    \begin{description}
+      \item[Slave mode]
+        As a DMA, the processor will send the configuration bitstream
+        stored on the RAM to the eFPGA. In this mode, the eFPGA is considered as a
+        writeable memory and is configured by the processor.
+      \item[Master mode]
+        Once the FPGA is programmed, it becomes a coprocessor achieving the aimed task.
+    \end{description}
+      The top architecture of this SoC based-platform will be generated using COACH
+      framework. The application that will be run on the SoC corresponds initially to a
+      graph of software tasks. Critical tasks will be identified and transformed
+      automatically to hardware tasks using COACH high level synthesis feature. While
+      software tasks will be run on the processor, hardware ones will be mapped on eFPGA
+      to take advantage of its optimized resources and parallelism. FLEXRAS provides all
+      the flow from RTL synthesis to bitstream generation.
+    \begin{livrable}
+      \itemL{0}{6}{d}{\Szied}{\zied architecture}{2.4:0:0}
+        FLEXRAS will use IPs provided by LIP6 (vhdl models of SoCLIB) and its eFPGA IP to
+        generate the SoC architecture.
+        This delivrable is a document that describes this architecture.
+      \itemL{6}{12}{h}{\Szied}{eFPGA/VCI component}{3.6:0:0}
+        FLEXRAS has to adapt the eFPGA interface to connect it to the VCI bus.
+        This delivrable is a VHDL description.
+      \itemL{12}{18}{x}{\Szied}{bitstream loader port}{0:3.6:0}
+        Port of the bitstream loader to the MUTEK operating system.
+      \itemL{18}{24}{x}{\Szied}{????????????}{0:2.4:0}
+        \mustbecompleted{FIXME:PAS-CLAIR}
+        FLEXRAS will propose a graph of software tasks. The hardware task to be mapped on
+        the FPGA will be generated using the high level synthesis tool of COACH framework. 
+      \itemL{24}{30}{x}{\Szied}{eFPGA characterisation}{0:0:2.4}
+        This delivrable is a file under the format defined by the delivrable
+        \specMacroCell that characterizes the eFPGA. This will allows the COACH HLS tools
+        to run taking into account the eFPGA delays.
+      \itemL{30}{36}{d}{\Szied}{\zied evaluation}{0:0:3.6}
+        This delivrable is a document that describes the tests, the validation and the
+        evaluation of COACH with the \zied architecture and tools.
+    \end{livrable}
+
+  \subtask This \ST relies to the COACH use by \navtel.
     \\\mustbecompleted{FIXME:NAVTEL:BEGIN ---------------}\\
     INDIQUER en quelques lignes \\
@@ -66,3 +174,2 @@
     \end{livrable}
 \end{workpackage}
-
