Changeset 125 for anr


Ignore:
Timestamp:
Feb 10, 2010, 2:46:47 PM (15 years ago)
Author:
coach
Message:

IA: updated navtel

Location:
anr
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • anr/gantt.l

    r123 r125  
    789789    do_partner_table_full(9); do_partner_table_short(9);
    790790    do_partner_table_full(10); do_partner_table_short(10);
     791    do_partner_table_full(11); do_partner_table_short(10);
    791792
    792793    return 0;
  • anr/section-7.tex

    r123 r125  
    240240\item[Equipment]
    241241    In order to validate the design flow,TRT will buy FPGA developpement boards. The cost
    242     for these FPGA boards is estimated to 20 k€ (6\% of the total ANR funding).
     242    for these FPGA boards is estimated to 20 k\euro (6\% of the total ANR funding).
    243243\item[Personnel costs]
    244244    \mustbecompleted{
     
    253253\item[Travel]
    254254    The travel costs are associated to meeting, plenaries as well as participation to
    255     conferences. The travel costs are estimated to 10k€. The travel costs are estimated to
     255    conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to
    256256    5\% of the total requested ANR funding.
    257257\item[Expenses for inward billing] none
     
    266266%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    267267\subsection{Partner 10: \navtel}
    268 \ressourcehelp
    269 
     268
     269\begin{description}
     270\item[Equipment]
     271    Navtel will use FPGA board with ARM processors for the validation.
     272    The costs for depreciation of the board and the instrument of the test
     273    are evaluated to 7\% of the total requested ANR funding.
     274\item[Personnel costs]
     275    A permanent engineer will be assigned on average 1/3 time to
     276        the all the duration of the project.
     277    The table below shows the estimated man power cost in months for the delivrables.
     278    \begin{center}\input{table_navtel_full.tex}\end{center}
     279\item[Subcontracting]
     280    No subcontracting costs.
     281\item[Travel]
     282    The travel costs are associated to meeting, plenaries as well as participation to
     283    conferences. The travel costs are estimated to 3 k\euro.
     284\item[Expenses for inward billing] none
     285\item[Other working costs] none
     286\end{description}
  • anr/task-6.tex

    r123 r125  
    138138    \end{livrable}
    139139
    140   \subtask This \ST relies to the COACH use by \navtel.
    141     \\\mustbecompleted{FIXME:NAVTEL:BEGIN ---------------}\\
    142     INDIQUER en quelques lignes \\
    143       \hspace*{1cm} 1) ce que vous voulez faire \\
    144       \hspace*{1cm} 2) ce que vous allez faire avec COACH \\
    145     Pour les deliverables qu'on voit un rapport avec COACH,
    146     et indiquer: la date de debut, la date de fin, le nombre de homme*home
    147     pour l'année 1, l'année 2, l'année 3.
    148     \par
    149     De plus il me faut qq pour la page 42 (voir page precedente).
    150     \\\mustbecompleted{FIXME:NAVTEL:END -------------------}
     140  \subtask
     141The Navtel Embedded Supper Computing(ESC) project is based on simple hardware but tightly coupled module between  ARM processor and FPGA.
     142The ARM and FPGA configuration also facilitate the co-simulation which allows to  gain time on the development and integration phase.
     143The architecture consists of a wrapper that encapsules computing units depend on the
     144application.
     145To day Navtel develop these computing units manually.
     146Navtel expects to benefit from the COACH project to obtain the computing unit generation
     147tools.
     148
     149The system level cores for FPGA are generated using high level  synthesize tool and scheduled using a real time kernal for task switching and partial reconfiguration on run time environment.
     150
     151The ESC can function on different topologies: Single, parallel or Grid computing modes for industrial and scientific applications.
     152
    151153    \begin{livrable}
    152     \itemV{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}
    153         %Choice of the demonstrator and its implementation as a PC C/C++ program.
    154         Navtel delivers  a single node embedded hardware which consists of an ARM
    155         processor and a Spartan 6 FPGA for the experimentation of an embedded super
    156         computing system.
    157         \mustbecompleted{FIXME:NAVTEL On ne voit pas le rapport avec COACH !!!}
    158     \itemL{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}{0:0:0}
    159         A wrapper technology demonstrator with partial reconfiguration and its interface
    160         with real time scheduler.
    161         \mustbecompleted{FIXME:NAVTEL 1) On ne voit pas le rapport avec COACH !!!
    162         2) si ca s'arrete la il n'y a aucun lien avec COACH puisque COACH commence
    163         seulement a tourner a T0+12
    164         }
    165 %    \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator}
    166 %        This deliverable is a report that describes the experimentation done with the
    167 %        T0+12 COACH milestone.
    168 %    \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator}
    169 %        This deliverable is a report that describes the experimentation done with the
    170 %        T0+24 COACH milestone.
    171 %    \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0}
    172 %        This deliverable is a report that describes the experimentation done with the
    173 %        pre-final COACH release.
     154    \itemL{0}{6}{d}{\Snavtel}{\navtel \ganttlf demonstrator specification}{4:0:0}
     155        A document that will be define the requirements for
     156                automatic code generation for signal processing unit.
     157    \itemL{6}{18}{h}{\Snavtel}{\navtel \ganttlf wrapper adaptation}{2:0:0}
     158                The adaptation of our wrapper to support coprocessor generated by COACH.
     159    \itemL{18}{36}{d}{\Snavtel}{\navtel evaluation}{0:0:6}
     160                \navtel will test the HLS tootls of COACH framework on our market sector such as
     161                digital communication, imaging and industrial control.
     162                A document will be written that describes the results obtained with the COACH High Level
     163                Synthesize for the generation computing units.
     164                These results take into account
     165            1) performance in terms of space and time
     166                        2) Friendlyness of the environment.
    174167    \end{livrable}
    175168\end{workpackage}
     169        %\CoutHorsD{0}{36}{\Snavtel}{managment}{1:1:1}
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