Index: /anr/gantt.l =================================================================== --- /anr/gantt.l (revision 124) +++ /anr/gantt.l (revision 125) @@ -789,4 +789,5 @@ do_partner_table_full(9); do_partner_table_short(9); do_partner_table_full(10); do_partner_table_short(10); + do_partner_table_full(11); do_partner_table_short(10); return 0; Index: /anr/section-7.tex =================================================================== --- /anr/section-7.tex (revision 124) +++ /anr/section-7.tex (revision 125) @@ -240,5 +240,5 @@ \item[Equipment] In order to validate the design flow,TRT will buy FPGA developpement boards. The cost - for these FPGA boards is estimated to 20 k€ (6\% of the total ANR funding). + for these FPGA boards is estimated to 20 k\euro (6\% of the total ANR funding). \item[Personnel costs] \mustbecompleted{ @@ -253,5 +253,5 @@ \item[Travel] The travel costs are associated to meeting, plenaries as well as participation to - conferences. The travel costs are estimated to 10k€. The travel costs are estimated to + conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to 5\% of the total requested ANR funding. \item[Expenses for inward billing] none @@ -266,4 +266,21 @@ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsection{Partner 10: \navtel} -\ressourcehelp - + +\begin{description} +\item[Equipment] + Navtel will use FPGA board with ARM processors for the validation. + The costs for depreciation of the board and the instrument of the test + are evaluated to 7\% of the total requested ANR funding. +\item[Personnel costs] + A permanent engineer will be assigned on average 1/3 time to + the all the duration of the project. + The table below shows the estimated man power cost in months for the delivrables. + \begin{center}\input{table_navtel_full.tex}\end{center} +\item[Subcontracting] + No subcontracting costs. +\item[Travel] + The travel costs are associated to meeting, plenaries as well as participation to + conferences. The travel costs are estimated to 3 k\euro. +\item[Expenses for inward billing] none +\item[Other working costs] none +\end{description} Index: /anr/task-6.tex =================================================================== --- /anr/task-6.tex (revision 124) +++ /anr/task-6.tex (revision 125) @@ -138,38 +138,32 @@ \end{livrable} - \subtask This \ST relies to the COACH use by \navtel. - \\\mustbecompleted{FIXME:NAVTEL:BEGIN ---------------}\\ - INDIQUER en quelques lignes \\ - \hspace*{1cm} 1) ce que vous voulez faire \\ - \hspace*{1cm} 2) ce que vous allez faire avec COACH \\ - Pour les deliverables qu'on voit un rapport avec COACH, - et indiquer: la date de debut, la date de fin, le nombre de homme*home - pour l'année 1, l'année 2, l'année 3. - \par - De plus il me faut qq pour la page 42 (voir page precedente). - \\\mustbecompleted{FIXME:NAVTEL:END -------------------} + \subtask +The Navtel Embedded Supper Computing(ESC) project is based on simple hardware but tightly coupled module between ARM processor and FPGA. +The ARM and FPGA configuration also facilitate the co-simulation which allows to gain time on the development and integration phase. +The architecture consists of a wrapper that encapsules computing units depend on the +application. +To day Navtel develop these computing units manually. +Navtel expects to benefit from the COACH project to obtain the computing unit generation +tools. + +The system level cores for FPGA are generated using high level synthesize tool and scheduled using a real time kernal for task switching and partial reconfiguration on run time environment. + +The ESC can function on different topologies: Single, parallel or Grid computing modes for industrial and scientific applications. + \begin{livrable} - \itemV{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} - %Choice of the demonstrator and its implementation as a PC C/C++ program. - Navtel delivers a single node embedded hardware which consists of an ARM - processor and a Spartan 6 FPGA for the experimentation of an embedded super - computing system. - \mustbecompleted{FIXME:NAVTEL On ne voit pas le rapport avec COACH !!!} - \itemL{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}{0:0:0} - A wrapper technology demonstrator with partial reconfiguration and its interface - with real time scheduler. - \mustbecompleted{FIXME:NAVTEL 1) On ne voit pas le rapport avec COACH !!! - 2) si ca s'arrete la il n'y a aucun lien avec COACH puisque COACH commence - seulement a tourner a T0+12 - } -% \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} -% This deliverable is a report that describes the experimentation done with the -% T0+12 COACH milestone. -% \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} -% This deliverable is a report that describes the experimentation done with the -% T0+24 COACH milestone. -% \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0} -% This deliverable is a report that describes the experimentation done with the -% pre-final COACH release. + \itemL{0}{6}{d}{\Snavtel}{\navtel \ganttlf demonstrator specification}{4:0:0} + A document that will be define the requirements for + automatic code generation for signal processing unit. + \itemL{6}{18}{h}{\Snavtel}{\navtel \ganttlf wrapper adaptation}{2:0:0} + The adaptation of our wrapper to support coprocessor generated by COACH. + \itemL{18}{36}{d}{\Snavtel}{\navtel evaluation}{0:0:6} + \navtel will test the HLS tootls of COACH framework on our market sector such as + digital communication, imaging and industrial control. + A document will be written that describes the results obtained with the COACH High Level + Synthesize for the generation computing units. + These results take into account + 1) performance in terms of space and time + 2) Friendlyness of the environment. \end{livrable} \end{workpackage} + %\CoutHorsD{0}{36}{\Snavtel}{managment}{1:1:1}