- Timestamp:
- Feb 11, 2010, 4:39:19 PM (15 years ago)
- Location:
- anr
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- 5 edited
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anr/section-4.1.tex
r126 r132 51 51 \xcoach generated by a plugin into the GNU C compiler (GCC). 52 52 This allows on the one hand to insure that all the tools will 53 accept the same C++ description and on the other hand tomake possible53 accept the same C++ description and on the other hand make possible 54 54 their chaining. The front-end tools read a \xcoach description and generate 55 55 a new \xcoach description that exibits more parallelism or implement 56 specific instructions for ASIP. The back-end tools read a \xcoach57 description and generate a \xcoachplus description. This is a\xcoach58 description an otated with hardware information (scheduling, binding) required by56 specific instructions for ASIP. The back-end tools read an \xcoach 57 description and generate an \xcoachplus description. This is an \xcoach 58 description annotated with hardware information (scheduling, binding) required by 59 59 the VHDL and systemC drivers. 60 60 Furthermore, the back-end tools uses a macro-cell library (functional and memory … … 71 71 \parlf 72 72 The project is split into 8 tasks numbered from 1 to 8. There are described 73 bel low and detailled in section \ref{task-description}.73 below and detailled in section \ref{task-description}. 74 74 \begin{description} 75 75 \item[Task-1: \textit{Project management}] 76 This task rel ies to the monitoring of the COACH project.76 This task relates to the monitoring of the COACH project. 77 77 \item[Task-2: \textit{\Backbone}] This task tackles the fundamental points of the 78 78 project such as the defintion of the COACH inputs and outputs, … … 80 80 the design flow. 81 81 \item[task-3: \textit{System generation}] This task addresses the prototyping and 82 the generation of digital system. Apart from HAS that belong to t he task 382 the generation of digital system. Apart from HAS that belong to task 3 83 83 and 4, its components are those presented figure~\ref{archi-csg} 84 84 (e.g. \verb!CSG!, operating systems). … … 93 93 frequency. 94 94 \item[Task-6: \textit{PC/FPGA communication middleware}] 95 This task pools the features dedicated to HPC. The main arethe95 This task pools the features dedicated to HPC. These are mainly the 96 96 partitioning validation (see figure~\ref{archi-hpc}), the sytem drivers for 97 97 both PC and FPGA-SoC sides, the hardware communication components and … … 99 99 \item[Task-7: \textit{Industrial demonstrators}] 100 100 This task groups the demonstrators of the COACH project. 101 Most of them are industrial applications that will be developped with the COACH102 framework.103 Others consist in integrating COACH framework as a driver of industrial proprietary104 design tools.101 Most of them are industrial applications that will be developped within 102 the COACH framework. 103 Others consist in integrating the COACH framework as a driver of 104 industrial proprietary design tools. 105 105 \item{Task 8: \textit{Dissemination}} 106 This task relies tothe diffusion of the project results.106 This task concerns the diffusion of the project results. 107 107 It mainly consists of the production of 4 COACH releases (\verb!T0+12!, \verb!T0+18!, 108 108 \verb!T0+24! and \verb!T0+36!) 109 and the publication o n a WEB site of a tutorial.109 and the publication of a tutorial on a WEB site. 110 110 \end{description} 111 111 % … … 117 117 Figure~\ref{dependence-task} presents the tasks dependencies. 118 118 "$T_N \longrightarrow T_M$" means that $T_N$ impacts the $T_M$. 119 The more bold isthe arrow, the more important is the impact.119 The more bold the arrow, the more important is the impact. 120 120 The graph shows: 121 121 \begin{itemize} 122 \item Even that $T4$ and $T5$ functionalities are complementary, their123 developments are independent (thanks to\xcoach internal format).122 \item Notwithstanding that $T4$ and $T5$ functionalities are complementary, 123 their developments are independent (thanks to the \xcoach internal format). 124 124 \item $T3$ slightly depends on $T4$ and $T5$. Indeed, $T3$ may works 125 without $T4$ and $T5$ if we limit to digital systems without hardware126 accel lerators.127 \item $T3$ strongly impacts $T6$ but ,$T3$ does not depend at all on128 $T6$. Sodemonstrators ($T7$) of embedded system would not be impacted if125 without $T4$ and $T5$ if we limit ourselves to digital systems without hardware 126 accelerators. 127 \item $T3$ strongly impacts $T6$ but $T3$ does not depend at all on 128 $T6$. Hence demonstrators ($T7$) of embedded system would not be impacted if 129 129 $T6$ would fail. 130 \item $T2$ drives all the tasks ($T3$, $T4$, $T5$, $T6$) a t the heart of130 \item $T2$ drives all the tasks ($T3$, $T4$, $T5$, $T6$) and is at the heart of 131 131 the COACH project. 132 \item The demonstrators developped in $T7$, of course ,strongly depends on the achievements132 \item The demonstrators developped in $T7$, of course strongly depends on the achievements 133 133 of the previous tasks ($T2$, $T3$, $T4$, $T5$, $T6$). 134 134 \item $T8$ and $T1$ respectively depends on and impacts all the other tasks. -
anr/section-4.2.tex
r126 r132 20 20 21 21 \item[Management of knowledge, Intellectual Property Right (IPR) and Results Exploitation] 22 The partners will have to work under theeventual NDA constraints.22 The partners will have to work under eventual NDA constraints. 23 23 Prior Intellectual Property remains property of the concerned partners. 24 24 The exploitation of the results obtained in the project and by each partner involved in the consortium will 25 follow the rules written the articles of the Consortium Agreement accepted and signed by25 follow the rules written in the articles of the Consortium Agreement accepted and signed by 26 26 each partner at most 6 months after the project kick-off. 27 27 To manage the exploitation and dissemination plan within the project, six … … 32 32 will have to identify namely (and with their address, phone, fax and e-mail): 33 33 \begin{itemize} 34 \item The financial and administrative person authorized and the legal person authorized35 or at least the scientific and technical.36 \item A complete and detailed list will be communicated to each partner and to public 37 Authority.34 \item The financial and administrative person authorized and the legal 35 person authorized or at least the scientific and technical. 36 37 \item A complete and detailed list will be communicated to each partner and to the public Authority. 38 38 \item Mailing lists used by the partners for the day to day communication. 39 39 \end{itemize} … … 60 60 For this project format and size, a 12 months review by ANR, based on a yearly progress 61 61 report incorporating milestones reports and deliverables, seems optimum. 62 The internal consortium meetings will be six monthly, including a kick-off meeting at the 63 start of the project, in our eyes the most important of all, as it phases the partners for 64 the start of the project on. 62 The internal consortium meetings will be every six months, including a kick-off meeting at the 63 start of the project, in our eyes the most important of all, as it phases the partners for the start of the project. 65 64 \end{description} -
anr/section-4.4.tex
r126 r132 63 63 Partners have to agree on a convenient exchange format for all tools involved. 64 64 Because all the HAS tools rely on it, the \xcoach format specification is a 65 crucial step. There are no work-ar round but as mentionned in65 crucial step. There are no work-around but as mentionned in 66 66 section~\ref{xcoach-problem} (page~\pageref{xcoach-problem}) the five academic partners have worked on it 67 for a full year and a firstdocument already exists.67 for a full year and a preliminary document already exists. 68 68 %\item[\xcoachplus format (\novers{\specXcoachDoc}, 69 69 % \novers{\specXcoachToSystemC}, \novers{\specXcoachToVhdl})] -
anr/section-6.1.tex
r123 r132 134 134 more than 400 researchers, under the umbrella of the CNRS (Centre National de la Recherche Scientifique). 135 135 The \og System on Chip \fg Department of LIP6 consists of 80 people, including 40 PHD students. 136 The research focus on CAD tools and methods for VLSI and System on Chip design.136 The research focuses on CAD tools and methods for VLSI and System on Chip design. 137 137 \parlf 138 138 The annual budget is about 3 M{\texteuro}, and 1.5 M{\texteuro} are from research contracts. … … 161 161 \xilinx is the world leader in the domain of programmable logic circuits (FPGA). 162 162 \xilinx develops on one hand several FPGA architectures (CoolRunner, Spartan and Virtex 163 families) and in the other hand a software solution allowing exploiting the163 families) and on the other hand a software solution allowing exploiting the 164 164 characteristics of these FPGA. 165 165 \parlf … … 228 228 229 229 Thales is international, but Europe-centered. Research \& Development activities are 230 disseminated, and corporate Research and Technology is concentrated in Cent res in France,230 disseminated, and corporate Research and Technology is concentrated in Centers in France, 231 231 the United Kingdom and the Netherlands. 232 The R\&T in Thales emphasizes more particularly on critical information systems,232 The R\&T in Thales is focused mostly on critical information systems, 233 233 processing, control and cognitive systems, and autonomous systems. 234 234 … … 303 303 For manufacturing and industrialization, \navtel works with ISO certified partners. 304 304 The company clients include the CNES, ThalÚs Alenia Space, ThalÚs Communication, EADS, 305 Eutelsat, AIRBUS, Schlumberger. \navtel participates from the R\&D phase throughto the305 Eutelsat, AIRBUS, Schlumberger. \navtel participates from the R\&D phase up to the 306 306 system delivery. 307 307 -
anr/section-6.2.tex
r119 r132 2 2 Université Pierre et Marie Curie. 3 3 Alain Greiner is the initiator and the main architect of the SoCLib project. 4 This ANR plat -form for virtual prototyping of MPSoCs involved 6 industrial companies4 This ANR platform for virtual prototyping of MPSoCs involved 6 industrial companies 5 5 (including ST Microelectronics and Thales) and ten academic laboratories 6 6 (5 of them are involved in the Coach project). … … 16 16 From 1986 to 1990, he worked for the french BULL company, as team leader, 17 17 in charge of designing the Basic Processing Unit for the BULL 18 DPS7000 computer, the most powerfull mainframe fromthe family.18 DPS7000 computer, the most powerfull mainframe of the family. 19 19 \item 20 20 In 1990, Alain Greiner joined UPMC, as Professor and became the head of the 21 MASI laboratory in 1994. From 2000, he was thehead of the Hardware Department21 MASI laboratory in 1994. From 2000, he was head of the Hardware Department 22 22 of the LIP6 laboratory. 23 23 \item
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