- Timestamp:
- Feb 13, 2010, 9:44:25 PM (15 years ago)
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anr/task-6.tex
r134 r138 137 137 138 138 \subtask 139 The Navtel Embedded Supper Computing(ESC) project is based on simple hardware but tightly coupled module between ARM processor and FPGA. 140 The ARM and FPGA configuration also facilitate the co-simulation which allows to gain time on the development and integration phase. 141 The architecture consists of a wrapper that encapsules computing units depend on the 142 application. 143 To day Navtel develop these computing units manually. 144 Navtel expects to benefit from the COACH project to obtain the computing unit generation 145 tools. 146 147 The system level cores for FPGA are generated using high level synthesize tool and scheduled using a real time kernal for task switching and partial reconfiguration on run time environment. 148 149 The ESC can function on different topologies: Single, parallel or Grid computing modes for industrial and scientific applications. 150 151 \begin{livrable} 139 The \navtel Embedded Supper Computing (ESC) project is based on simple hardware but tightly 140 coupled module between ARM processor and FPGA. 141 The ESC can function on different topologies: Single, parallel or Grid computing modes for 142 industrial and scientific applications. 143 The ARM and FPGA configuration also facilitate the co-simulation which allows to gain 144 time on the development and integration phase. 145 The architecture consists of a wrapper that encapsules computing units depending on the 146 application and a real time kernal for task switching and partial reconfiguration of FPGA 147 on run time environment. 148 \parlf 149 To day \navtel develops these computing units manually. 150 \navtel expects to benefit from the COACH project especially the HLS tools for 151 generating the computing unit. 152 \begin{livrable} 152 153 \itemL{0}{6}{d}{\Snavtel}{\navtel \ganttlf demonstrator specification}{4:0:0} 153 A document that will be define the requirements for 154 automatic code generation for signal processing unit. 154 \setMacroInAuxFile{navtelSpecification} 155 A document that will define the requirements for automatic RTL generation for 156 signal processing units of our market sector such as digital communication, 157 imaging and industrial control. 158 This document will include the description of some already handmade processing units. 155 159 \itemL{6}{18}{h}{\Snavtel}{\navtel \ganttlf wrapper adaptation}{2:0:0} 156 160 The adaptation of our wrapper to support coprocessor generated by COACH. 157 161 \itemL{18}{36}{d}{\Snavtel}{\navtel evaluation}{0:0:6} 158 \navtel will test the HLS tootls of COACH framework on our market sector such as 159 digital communication, imaging and industrial control. 160 A document will be written that describes the results obtained with the COACH High Level 161 Synthesize for the generation computing units. 162 These results take into account 163 1) performance in terms of space and time 164 2) Friendlyness of the environment. 162 \navtel will test the COACH HLS tools on the processing units that are described 163 in the {\navtelSpecification} delivrable. 164 A document will be written that describes the results obtained taking into 165 account: 1) the performance in terms of space, 2) the performance in terms of 166 time, 3) the friendlyness of the environment. 165 167 \end{livrable} 166 168 \end{workpackage} 167 %\CoutHorsD{0}{36}{\Snavtel}{managment}{1:1:1}
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