Changeset 210

Timestamp:

Feb 16, 2010, 9:58:05 AM (14 years ago)

Author:

coach

Message:

UBS

File:

• anr/task-7.tex (modified) (1 diff)

anr/task-7.tex

@@ -65 +65 @@
     \itemL{18}{24}{d}{\Sirisa}{tutorial}{0:0:0}
         This tutorial shows how to customize a processor to obtain an ASIP.
-    \itemL{18}{24}{d}{\Subs}{tutorial}{0:0:1}
+    \itemL{18}{24}{d}{\Subs}{tutorial}{0:1:0}
         This tutorial shows how a task can be synthesized by using HLS tools developped in 
                 the COACH project.