Changeset 233 for anr

Timestamp:

Feb 16, 2010, 4:25:24 PM (15 years ago)

Author:

coach

Message:

UBS

File:

• anr/section-2.2.tex (modified) (5 diffs)

anr/section-2.2.tex

@@ -38 +38 @@
 \begin{description}
   \item[SOCLIB]
-    The SoCLib ANR platform (2007-2009) is an open infrastructure
-    for system level virtual prototyping of shared memory, multi-processors
+    The SoCLib ANR platform (2007-2009) is an open infrastructure developped by
+    10 academic laboratories and and 6 industrial companies. It supports
+    system level virtual prototyping of shared memory, multi-processors
     architectures. It provides tools to map multi-tasks software application on these
-%    The SoCLib ANR platform (2007-2009) is an open infrastructure developped by
-%    10 academic laboratories and and 6 industrial companies.
     (TIMA, LIP6, Lab-STICC, IRISA, ENST, CEA-LIST, CEA-LETI, CITI, INRIA-Futurs, LIS) and 6 
     industrial companies (Thales Communications, Thomson R\&D, STMicroelectronics, Silicomp, MDS, TurboConcept). 
-%    It supports system level virtual prototyping of shared memory, multi-processors
-%    architectures, and provides tools to map multi-tasks software application on these
-%    architectures, for reliable performance evaluation.
+    It supports system level virtual prototyping of shared memory, multi-processors
+    architectures, and provides tools to map multi-tasks software application on these
+    architectures, for reliable performance evaluation.
     The core of this platform is a library of SystemC simulation models for 
     general purpose IP cores such as processors, buses, networks, memories, IO controller.
     The platform provides also embedded operating systems and software/hardware
     communication middleware.
-%    The synthesisable VHDL models of IPs are not part of the SoCLib platform, and
-%    this project enhances SoCLib by providing the synthesisable VHDL models required
-%    for FPGA synthesis.
+    The synthesisable VHDL models of IPs are not part of the SoCLib platform, and
+    this project enhances SoCLib by providing the synthesisable VHDL models required
+    for FPGA synthesis.
     The synthesisable VHDL models of IPs are not part of the SoCLib platform, and
     this project enhances SoCLib by providing them.
-%  \item[ROMA] The ROMA ANR project (http://roma.irisa.fr, 2007-2010)
-%    involving IRISA (CAIRN team), LIRMM, CEA List THOMSON France R\&D,
-  \item[ROMA] The ROMA ANR project~\cite{roma}
+  \item[ROMA] The ROMA ANR project \cite{roma}
+    involving IRISA (CAIRN team), LIRMM, CEA List THOMSON France R\&D,
     proposes to develop a reconfigurable processor, exhibiting high
     silicon density and power efficiency, able to adapt its computing
@@ -73 +71 @@
 %    ASIP processors.
   \item[TSAR]
-%    The TSAR MEDEA+ project (2008-2010) involving BULL, THALES and the \upmc targets the design of a 
-    The TSAR MEDEA+ project (2008-2010) targets the design of a 
+     The TSAR MEDEA+ project (2008-2010) involving BULL, THALES and the \upmc targets the design of a 
+%    The TSAR MEDEA+ project (2008-2010) targets the design of a 
     scalable, coherent shared memory, multi-cores processor architecture, and uses the SoCLib
     plaform for virtual prototyping. The COACH project will benefit from the synthesizable VHDL 
@@ -144 +142 @@
 % IA2PC: secondaire.
 %VERS 3
-\item[Axis 3] \textit{Robotique et contr\^{o}le/commande} \\
-Manufacturing technology employs more and more SoC.
-COACH will permit to design such complex digital systems.
-\textbf{Thereby COACH indirectly answers to axis 3 too}.
+%\item[Axis 3] \textit{Robotique et contr\^{o}le/commande} \\
+%Manufacturing technology employs more and more SoC.
+%COACH will permit to design such complex digital systems.
+%\textbf{Thereby COACH indirectly answers to axis 3 too}.
+
+
 %\item[Axis 3 \& 5] \textit{Robotique et contr\^{o}le/commande} and \textit{S\'{e}curit\'{e} et suret\'{e}} \\
 %VERS 1
@@ -161 +161 @@
 %COACH will permit to design such complex digital systems.
 %\textbf{Thereby COACH indirectly answers to axis 3 and 5 too}.
+
+%\end{description}
+
+\item [Axis 3] \textit {Robotique et contr\^{o}le/commande}:
+
+COACH will address robotic and control applications domains by 
+allowing to design complex digital systems based on MPSoC architecture.
+Like in the consumer electronics domain, future control applications 
+will employ more and more SoC for safety and security applications. 
+Application domains for such systems are for example automotive,  
+aerospace or avionics domains (e.g. collision-detection, intelligent navigation...). 
+Manufacturing technology will also increasingly need high-end vision analysis and high-speed 
+robot control. 
+\textbf{Thereby COACH indirectly answers to axis 3}.
+
+\item [Axis 5] \textit {S\'{e}curit\'{e} et suret\'{e}}:
+
+The results of the COACH project will help users to build cryptographic secure systems implemented in
+hardware or both in software/hardware in an effective way, substantially enhancing the
+process productivity of the cryptographic algorithms hardware synthesis, improving the
+quality and reducing the design time and the cost of synthesised cryptographic devices.
+\textbf{Thereby COACH indirectly answers to axis 5}.
+
 \end{description}
-%Axis 3 "Robotique et contr\^{o}le/commande}"
-%
-%COACH will permit to design complex digital systems based on high-performance multi-core systems.
-%Like in the consumer electronics domain (telecommunication, multimedia), future control applications 
-%will employ more and more SoC not just for typical consumer functionality, but also for safety and 
-%security applications (by performing complex analyses on data gathered with intelligent sensors, 
-%by initiating appropriate responses to dangerous phenomena...). Application domains for such systems 
-%are for example the automotive domain, as well as the aerospace and avionics domains (i.e. sophisticated on-board 
-%radar systems, collision-detection, intelligent navigation...). 
-%Manufacturing technology will also increasingly need high-end vision analysis and high-speed 
-%robot control. In all cases, high performance and real time requirements are combined with 
-%requirements to low power, low temperature, high dependability, and low cost.
-%
-%Axis 5 "S\'{e}curit\'{e} et suret\'{e}" :
-%
-%The results of the COACH project will help users to build cryptographic secure systems implemented in
-%hardware or both in software/ hardware in an effective way, substantially enhancing the
-%process productivity of the cryptographic algorithms hardware synthesis, improving the
-%quality and reducing the design time and the cost of synthesised cryptographic devices.
 
 % IA2PC: 1) je ne vois pas trop ce que ca fait la.
@@ -197 +201 @@
 %
 % VERS 2 pour gagner de la place je l'enleve
+
+%PC2IA ok pas de probleme
+
 % COACH technologies can be used in both large and small business, as they will permit users to design
 % embedded systems which meet a wide range of requirements: from low cost and low power consuming