Index: /anr/section-2.1.tex
===================================================================
--- /anr/section-2.1.tex	(revision 247)
+++ /anr/section-2.1.tex	(revision 248)
@@ -62,6 +62,7 @@
 of FPGA-based solutions is limited by the lack of design automation.
 \\
-Nowadays, there are neither commercial nor academic tools covering the whole design process
-from the system level specification to the bit stream generation neither for embedded system design
+\\
+Nowadays, there are no commercial or academic tools covering the whole design flow
+from the system level specification to the bitstream generation neither for embedded system design
 nor for HPC.
 
@@ -103,7 +104,7 @@
 %the design process very complex and achievable only by designers skilled in many domains.
 
-\begin{center}\begin{minipage}{.8\linewidth}\textit{
+\begin{center}\begin{minipage}{.9\linewidth}\textit{
 The aim of the COACH project is to integrate all these design steps into a single design framework
-and to allow \textbf{pure software} developpers to develop embedded systems.
+and to allow \textbf{pure software} developpers to design embedded systems.
 }\end{minipage}\end{center}
 
Index: /anr/section-2.2.tex
===================================================================
--- /anr/section-2.2.tex	(revision 247)
+++ /anr/section-2.2.tex	(revision 248)
@@ -14,5 +14,5 @@
 %%%
 \parlf
-COACH will contribute to build an open development and run-time
+COACH will contribute to build an open design and run-time
 environment, including communication middleware and tools to support
 developers in the production of embedded software, through all phases of the software lifecycle,
@@ -22,5 +22,5 @@
 \item High level methods and concepts (esp. requirements and architectural level) for system
 design, development and integration, addressing complexity aspects and modularity.
-\item Open and modular development environments, enabling flexibility and extensibility by
+\item Open and modular design environments, enabling flexibility and extensibility by
 means of new or sector-specific tools and ensuring consistency and traceability along the
 development lifecycle.
@@ -29,5 +29,5 @@
 \end{itemize}
 COACH outcome will contribute to strengthen Europe's competitive position by developing
-technologies and methodologies for product development, focusing (in compliance with the
+technologies and methodologies for product design, focusing (in compliance with the
 %scope of the above program) on technologies, engineering methodologies, novel tools,
 %methods which facilitate resource use efficiency. The approaches and tools to be developed 
@@ -75,5 +75,5 @@
 %    The TSAR MEDEA+ project (2008-2010) targets the design of a 
     scalable, coherent shared memory, multi-cores processor architecture, and uses the SoCLib
-    plaform for virtual prototyping. The COACH project will benefit from the synthesizable VHDL 
+    plaform for virtual prototyping. COACH will benefit from the synthesizable VHDL 
     models developped in the framework of TSAR (MIPS32 processor core, and RING interconnect).
   \item[BioWic]
@@ -134,8 +134,9 @@
 \item[Axis 2] \textit{Infrastructures pour l'Internet, le calcul intensif ou les services} \\
 COACH will address High-Performance Computing (HPC) by helping designers to accelerate an 
-application running on a PC by migrating critical parts into a SoC implemented on an FPGA 
-plugged to the PC bus (through a communication link like PCI/X). COACH will reduce the designer 
-effort through the development of tools that translate high level language programs to FPGA 
-configurations. Moreover, Dynamic Partial Reconfiguration will be used for improving HPC performance 
+application running on a PC. 
+By providing tools that translate high level language programs to FPGA 
+configurations, COACH will allow to easily migrate critical parts into an FPGA plugged to the 
+PC bus (through a communication link like PCI/X). 
+Moreover, Dynamic Partial Reconfiguration will be used for improving HPC performance 
 as well as reducing the required area.
 \textbf{Thereby COACH partially corresponds to axis 2}.
@@ -168,10 +169,10 @@
 \item [Axis 3] \textit {Robotique et contr\^{o}le/commande}:
 
-COACH will address robotic and control applications domains by 
-allowing to design complex digital systems based on MPSoC architecture.
+COACH will address robotic and control applications by 
+allowing to design complex systems based on MPSoC architecture.
 Like in the consumer electronics domain, future control applications 
 will employ more and more SoC for safety and security applications. 
-Application domains for such systems are for example automotive,  
-aerospace or avionics domains (e.g. collision-detection, intelligent navigation...). 
+Application domains for such systems are for example automotive 
+or avionics domains (e.g. collision-detection, intelligent navigation...). 
 Manufacturing technology will also increasingly need high-end vision analysis and high-speed 
 robot control. 
