Index: /anr/section-1.tex
===================================================================
--- /anr/section-1.tex	(revision 249)
+++ /anr/section-1.tex	(revision 250)
@@ -42,13 +42,14 @@
 \begin{description}
 \item[Design Space Exploration:]
-    The COACH environment will support design space exploration to help the
-    system designer to select and parameterize the target architecture, and to
-    define the proper hardware/software partitioning of the application.
+
+    The COACH environment will allow to describe an application as a process 
+	network i.e. a set of tasks communicating through FIFO channels.
+	COACH will allow to map the application on a shared-memory, MPSoC architecture. 
+    It will permit to easily explore the design space to help the system designer 
+	to define the proper hardware/software partitioning of the application.
     For each point in the design space, metrics such as throughput, latency, power
     consumption, silicon area, memory allocation and data locality will be provided.
     These criteria will be evaluated by using the SoCLib virtual prototyping infrastructure
     and high-level estimation methodologies.
-	\mustbecompleted{FIXME :: Question que l'on peut se poser sur DSE : quelle est la nouveaté la dedans ?
-	Doit on parler ici de modele de programmation, de mapping... qui permettent un DSE?}
 	
 \item[Hardware Accelerators Synthesis (HAS):]