Changeset 257 for anr


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Timestamp:
Feb 18, 2010, 8:27:00 AM (15 years ago)
Author:
coach
Message:

UBS

File:
1 edited

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  • anr/task-6.tex

    r231 r257  
    3131    \end{livrable}
    3232
    33   \subtask The objective of this sub-task is to specify the application and to develop the
    34     high level code. The application is in the domain of surveillance of critical
     33  \subtask In this sub-task, \TRT will specify and develop the
     34    high level code of an application in the domain of surveillance of critical
    3535    infrastructures.
    3636    The objective is to detect and classify the presence of humans in the restricted area.
    37     The algorithm is based on the work of Viola and Jones\cite{thales-viola}.
     37    The algorithm we will use is based on the work of Viola and Jones\cite{thales-viola}.
    3838    It implements in particular a cascade of classifiers operating on Haar like features,
    3939    where simple weak classifiers at the beginning of the cascade reject a majority of
     
    6969
    7070  \subtask
    71     In this task, \TRT will evaluate the COACH platform. In particular, \TRT will verify
     71    In this sub-task, \TRT will evaluate the COACH platform. In particular, \TRT will verify
    7272    its ability to generate a whole VHDL of an embedded system on FPGA for an application
    7373    mixing control and data flow aspects. \TRT will evaluate the performance of the
     
    8888    \end{livrable}
    8989
    90   \subtask FLEXRAS proposes a SoC architecture integrating an embedded FPGA (eFPGA).
     90  \subtask FLEXRAS will design an application based on MPEG-2 video standard.
     91        FLEXRAS will propose a SoC architecture integrating an embedded FPGA (eFPGA).
    9192    The architecture is composed essentially of a processor, a bus and several RAMs.
    9293    The embedded FPGA is connected to the bus and communicates with the other components.
     
    119120      \itemL{18}{24}{x}{\Szied}{\zied demonstrators}{0:2.4:0}
    120121        \zied will propose to test COACH framework and the \zied architecture template
    121         throught a basic application.
     122        throught an application based on MPEG-2.
    122123        This applicattion will containt 3 communicating tasks under the COACH format specified
    123124        in {\novers{\specGenManual}} deliverable.
     
    139140  The \navtel Embedded Supper Computing (ESC) project is based on simple hardware but tightly
    140141  coupled module between ARM processor and FPGA.
     142  For the COACH project, \navtel will automatically synthetize two cores: one for software radio
     143  through a polyphase resampler and one for an industrial control application through an embedded
     144  PID controller.
     145  The objective is to sequence the cores in realtime in FPGA using partial configuration methods.
     146  This will allow us to gain experience on automatic multi core sequencing at system level. The
     147  specification for our first work package will concern this aspect.
     148
    141149  The ESC can function on different topologies: Single, parallel or Grid computing modes for
    142150  industrial and scientific applications.
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