Index: /anr/task-backbone.tex
===================================================================
--- /anr/task-backbone.tex	(revision 297)
+++ /anr/task-backbone.tex	(revision 298)
@@ -61,5 +61,8 @@
     \begin{livrable}
     \itemL{0}{6}{d}{\Supmc}{COACH internal \ganttlf software architecture}{1:0:0}
+        \OtherPartner{0}{6}{\Stima}  {.5:0:0}
         This document lists all the COACH software components and how they cooperate.
+        It will refine the software architecture presented in
+        Figures~\ref{archi-hls} and~\ref{archi-hpc}.
     \end{livrable}
 %
@@ -77,4 +80,6 @@
         developers of HAS tools suggested.
     \itemL{12}{18}{d+x}{\Slip}{\xcoach format specification}{7:3:0}
+        \OtherPartner{0}{18}{\Supmc}  {.5:.5:0}
+        \OtherPartner{0}{18}{\Stima}  {.5:.5:0}
         \setMacroInAuxFile{specXcoachDoc}
         Last release of XML specification of the \xcoach format enhanced with
@@ -116,4 +121,6 @@
     \begin{livrable}
     \itemL{0}{6}{d}{\Subs}{Macro-cell definition}{1:0:0}
+        \OtherPartner{0}{6}{\Supmc}  {.5:0:0}
+        \OtherPartner{0}{6}{\Stima}  {.5:0:0}
         \setMacroInAuxFile{specMacroCell}
         Definition of the macro cells and the file format describing them.
Index: /anr/task-csg.tex
===================================================================
--- /anr/task-csg.tex	(revision 297)
+++ /anr/task-csg.tex	(revision 298)
@@ -26,8 +26,8 @@
 	the connection of the coprocessors on the platform bus.
     \begin{livrable}
-    \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{3:9:0}
+    \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{2:7:0}
         \setMacroInAuxFile{hpcPlbBridge}
         The synthesizable VHDL description of a PLB/VCI bridge.
-    \itemL{9}{18}{h}{\Supmc}{HPC hardware \altera}{1:2:0}
+    \itemL{9}{18}{h}{\Supmc}{HPC hardware \altera}{2:7:0}
         \setMacroInAuxFile{hpcAvalonBridge}
         The synthesizable VHDL description of an AVALON/VCI bridge.
@@ -43,7 +43,11 @@
     \itemV{8}{18}{x}{\Stima}{DNA 0S}
         The drivers required for the second CSG milestone.
-    \itemL{18}{33}{x}{\Stima}{DNA OS drivers}{6:3:2}
+    \itemL{18}{33}{x}{\Stima}{DNA OS drivers for SoCLib}{6:2:2}
+        \OtherPartner{6}{33}{\Supmc}  {2:1:1}
+        \mustbecompleted{TIMA : ajouter des précisions sur le travail et ce
+        que fait upmc}
         Final release of the DNA OS drivers.
-    \itemL{6}{18}{x}{\Stima}{Ports of DNA OS}{3:1:0}
+    \itemL{6}{18}{x}{\Stima}{Driver ports}{3:1:0}
+    \mustbecompleted{TIMA: tima sur Microblaze, UPMC sur Nios}
         Porting of DNA OS on the NIOS2 and MICROBLAZE processors.
     \end{livrable}
@@ -61,4 +65,7 @@
 		\altera architectural template.
     \itemL{24}{36}{x}{\Supmc}{CSG tool}{6:5.5:5.5}
+        \OtherPartner{0}{36}{\Stima}{0:6:0}
+        \mustbecompleted{TIMA : integration d'OS dans CSG, en
+        particulier DNA}
 		\setMacroInAuxFile{csgImplementation}
         Final release of CSG enhanced by the demonstrator's feedback.