- Timestamp:
- Dec 17, 2010, 4:02:47 PM (14 years ago)
- Location:
- anr
- Files:
-
- 2 edited
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- Unmodified
- Added
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anr/task-backbone.tex
r291 r298 61 61 \begin{livrable} 62 62 \itemL{0}{6}{d}{\Supmc}{COACH internal \ganttlf software architecture}{1:0:0} 63 \OtherPartner{0}{6}{\Stima} {.5:0:0} 63 64 This document lists all the COACH software components and how they cooperate. 65 It will refine the software architecture presented in 66 Figures~\ref{archi-hls} and~\ref{archi-hpc}. 64 67 \end{livrable} 65 68 % … … 77 80 developers of HAS tools suggested. 78 81 \itemL{12}{18}{d+x}{\Slip}{\xcoach format specification}{7:3:0} 82 \OtherPartner{0}{18}{\Supmc} {.5:.5:0} 83 \OtherPartner{0}{18}{\Stima} {.5:.5:0} 79 84 \setMacroInAuxFile{specXcoachDoc} 80 85 Last release of XML specification of the \xcoach format enhanced with … … 116 121 \begin{livrable} 117 122 \itemL{0}{6}{d}{\Subs}{Macro-cell definition}{1:0:0} 123 \OtherPartner{0}{6}{\Supmc} {.5:0:0} 124 \OtherPartner{0}{6}{\Stima} {.5:0:0} 118 125 \setMacroInAuxFile{specMacroCell} 119 126 Definition of the macro cells and the file format describing them. -
anr/task-csg.tex
r296 r298 26 26 the connection of the coprocessors on the platform bus. 27 27 \begin{livrable} 28 \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{ 3:9:0}28 \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{2:7:0} 29 29 \setMacroInAuxFile{hpcPlbBridge} 30 30 The synthesizable VHDL description of a PLB/VCI bridge. 31 \itemL{9}{18}{h}{\Supmc}{HPC hardware \altera}{ 1:2:0}31 \itemL{9}{18}{h}{\Supmc}{HPC hardware \altera}{2:7:0} 32 32 \setMacroInAuxFile{hpcAvalonBridge} 33 33 The synthesizable VHDL description of an AVALON/VCI bridge. … … 43 43 \itemV{8}{18}{x}{\Stima}{DNA 0S} 44 44 The drivers required for the second CSG milestone. 45 \itemL{18}{33}{x}{\Stima}{DNA OS drivers}{6:3:2} 45 \itemL{18}{33}{x}{\Stima}{DNA OS drivers for SoCLib}{6:2:2} 46 \OtherPartner{6}{33}{\Supmc} {2:1:1} 47 \mustbecompleted{TIMA : ajouter des précisions sur le travail et ce 48 que fait upmc} 46 49 Final release of the DNA OS drivers. 47 \itemL{6}{18}{x}{\Stima}{Ports of DNA OS}{3:1:0} 50 \itemL{6}{18}{x}{\Stima}{Driver ports}{3:1:0} 51 \mustbecompleted{TIMA: tima sur Microblaze, UPMC sur Nios} 48 52 Porting of DNA OS on the NIOS2 and MICROBLAZE processors. 49 53 \end{livrable} … … 61 65 \altera architectural template. 62 66 \itemL{24}{36}{x}{\Supmc}{CSG tool}{6:5.5:5.5} 67 \OtherPartner{0}{36}{\Stima}{0:6:0} 68 \mustbecompleted{TIMA : integration d'OS dans CSG, en 69 particulier DNA} 63 70 \setMacroInAuxFile{csgImplementation} 64 71 Final release of CSG enhanced by the demonstrator's feedback.
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