Index: /anr/anr.bib
===================================================================
--- /anr/anr.bib	(revision 311)
+++ /anr/anr.bib	(revision 312)
@@ -1,2 +1,28 @@
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+%%%%% MDS
+@inproceedings{mds:2008,
+ author = {Kruijtzer Wido, Van der Wolf Pieter, de Kock Erwin, Stuyt Jan, Wolfgang Ecker, Mayer Albrecht, Hustin Serge, Amerijckx Christophe, de Paoli Serge and Vaumorin Emmanuel},
+ title = {Industrial IP integration flows based on IP-XACT standards},
+ booktitle = {Proceedings of the conference on Design, automation and test in Europe},
+ series = {DATE '08},
+ year = {2008},
+ isbn = {978-3-9810801-3-1},
+ location = {Munich, Germany},
+ pages = {32--37},
+ numpages = {6},
+ url = {http://doi.acm.org/10.1145/1403375.1403386},
+ doi = {http://doi.acm.org/10.1145/1403375.1403386},
+ acmid = {1403386},
+ publisher = {ACM},
+ address = {New York, NY, USA},
+} 
+
+@report{rapportministere,
+ author = {Eric Bant\'egnie, Claude Lepape, Jean-Luc Dormoy},
+ title = {Briques g\'en\'eriques du logiciel embarqu\'e},
+ year = {2010},
+ publisher = {Mininist\'ere de l'industrie},
+}
+
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 %%%%% LIP6
Index: /anr/section-consortium-people.tex
===================================================================
--- /anr/section-consortium-people.tex	(revision 311)
+++ /anr/section-consortium-people.tex	(revision 312)
@@ -33,7 +33,8 @@
 
 \peopletabularentry{\mds}            
-coordinator & Vaumorin    & Emannuel    & Strategic Project Manager & ESL   & ... & Project leader \\\hline
-...         & Spasevski   & Cyril       & CTO                 & EDA         & ... & Technical specifications \\\hline
-...         & Guntz       & St\'ephane  & VP of Engineering   & EDA         & ... & Demonstrator specification and management \\\hline                       ...         & Lucas       & Ronan       &         & EDA         & ... & Tools and demonstrator implementation \\\hline        
+coordinator & Vaumorin    & Emannuel    & Strategic Project Manager & ESL      & 20 & Project leader \\\hline
+contributor & Spasevski   & Cyril       & CTO                 & EDA            & 6 & Technical specifications \\\hline
+contributor & Guntz       & St\'ephane  & VP of Engineering   & EDA            & 12 & Demonstrator specification and management \\\hline
+contributor & Lucas       & Ronan       & R\&D Engineer       & HW/SW Codesign & 12 & Tools and demonstrator implementation \\\hline
 
 \peopletabularentry{\irisa}
Index: /anr/section-issues.tex
===================================================================
--- /anr/section-issues.tex	(revision 311)
+++ /anr/section-issues.tex	(revision 312)
@@ -7,5 +7,5 @@
 dâapplication, âŠ). Indicateurs des gains environnementaux, cycle de vie.}
 %
-\subsubsection*{Predominance of FPGA in the global electronic market}
+\subsubsection*{The electronic market}
 \begin{table}\leavevmode\center
 \begin{small}\begin{tabular}{|l|l|l|l|}\hline
@@ -29,5 +29,6 @@
 Microelectronic components allow the integration of complex functions into products, increases
 commercial attractivity of these products and improves their competitivity.
-Multimedia and tele-communication sectors have taken advantage from microelectronics facilities
+\cite{rapport-ministere} estimates a 7\% growth of the micro-electronic market until 2015 minimum.
+Multimedia and communication sectors have taken advantage from microelectronics facilities
 thanks to the developpment of design methodologies and tools for embedded systems.
 Unfortunately, the Non Recurring Engineering (NRE) costs involded in the design
@@ -35,10 +36,12 @@
 An IC foundry costs several billions of euros and the fabrication of a specific circuit
 costs several millions. For example a conservative estimate for a 65nm ASIC project is 10
-million USD.
-Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium
-volume markets.
+million USD.C onsequently, it is more and more unaffordable to design and fabricate ASICs for low and medium 
+volume markets and the new trend for building the new generation products will be multi processors SoCs and programmable logic for co-processsing.
+\\
+According to a market survey (J-M. Chery, CTO ST Microelectronics at European NanoelectronicsForum 2010), the global growth is 30 Billons\$ between 2009-2013 for multimedia and communication sectors; this is 6 times more than all other domains like security, home automation, health.
+The predominance of market of multimedia and communication sectors results in the fact that they are mainly mass market.
 %
 \subsubsection*{FPGAs and Embedded Systems}
-Today, FPGAs become important actors in the computational domain that was originally dominated
+Today, FPGAs become important in the computational domain that was originally dominated
 by microprocessors and ASICs. Just like microprocessors, FPGA based systems can be reprogrammed
 on a per-application basis. For many applications, FPGAs offer significant performance benefits over
@@ -74,5 +77,5 @@
 \subsubsection*{Evolution of architectures}
 Nowadays processors mixing core and programmable matrix are available on the market (eg. Intel ATOM E600C).
-"Donald Newell, AMD technical manager, envisions that such circuits will be at the heart of most of the electronic 
+Donald Newell, AMD technical manager, envisions that such circuits will be at the heart of most of the electronic 
 products (eg. PDAs and nomad items) and even personal computers. 
 To take benefit of such architecture, developping and deploying application will require innovative codesign methods and tools.
@@ -82,5 +85,5 @@
 Nowadays, there are no commercial or academic tools covering the whole design flow
 from the system level specification to the bitstream generation neither for embedded system design
-nor for HPC.
+nor for HPC. 
 \begin{center}\begin{minipage}{.9\linewidth}\textit{
 The aim of the COACH project is to integrate all these design steps into a single design framework
@@ -102,2 +105,4 @@
 and the advent of high level programming languages which allowed a high number of programmers 
 to launch start-ups in software engineering.
+\\
+So this may increase the total amount of engineers working in this domain: today in France the total is only 26,000 in which 16,000 in big companies \cite{rapport-ministere}.
Index: /anr/task-demonstrator.tex
===================================================================
--- /anr/task-demonstrator.tex	(revision 311)
+++ /anr/task-demonstrator.tex	(revision 312)
@@ -109,9 +109,7 @@
         \NOVERStrtSpearde, \NOVERSmdsAppSpecification)
         using the COACH milestone of T0+18.
-      \itemV{27}{30}{d+x}{\Smds}{Evaluation}
-        Same as former but for the milestone of T0+27.
-      \itemL{30}{36}{d+x}{\Smds}{Evaluation}{0:5:5}
+      \itemL{27}{36}{d+x}{\Smds}{Evaluation}{0:3:3}
         \OtherPartner{18}{36}{Sbull}{0:4:5}
-        \OtherPartner{18}{36}{Sthales}{0:5:5}
+        \OtherPartner{18}{36}{Sthales}{0:4:5}
         This deliverable is a document that validates and evaluates the COACH final release
         for the demonstrators.
Index: /anr/task-dissemination.tex
===================================================================
--- /anr/task-dissemination.tex	(revision 311)
+++ /anr/task-dissemination.tex	(revision 312)
@@ -78,5 +78,5 @@
   \subtask{Publications and Communications}
    \begin{livrable}
-   \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:3:3}
+   \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:2:3}
         \OtherPartner{12}{36}{\Sirisa} {0:1:1}
         \OtherPartner{12}{36}{\Slip}   {0:1:1}
