- Timestamp:
- Jan 26, 2011, 6:15:22 PM (14 years ago)
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anr/task-frontend.tex
r304 r328 58 58 \end{livrable} 59 59 60 \subtask{Parallelism optimization} 61 Extraction of parallelism in polyhedral loops and conversion into a process network. 60 \subtask{Automatic parallelization and memory optimization} 61 62 This sub-task aims at providing a source-level optimizer in front the 63 HLS back-end tools. The optimization are twofold: 64 \begin{itemize} 65 \item Extraction of parallelism in polyhedral loops and conversion 66 into a process network. 67 \item Minimization of intra-process local memory 68 \item Construction of inter-process FIFOs 69 \end{itemize} 70 We will design these methods by using polyhedral techniques, as we did 71 in the past for pure HPC optimizations. The program model is typically 72 regular programs with affine loop bound conditions and array index 73 functions. In a second part, we will extend the program model by using 74 conservative approximations. 62 75 \begin{livrable} 63 76 \itemV{0}{6}{d}{\Slip}{Method, Preliminary Definition} 64 77 Description and specification of a process construction method for programs with 65 78 polyhedral loops. 66 \itemL{30}{36}{d}{\Slip}{Process generation method}{10:0:9}67 Final assessment of the method and improved version of the specification.68 79 \itemV{6}{12}{x}{\Slip}{Process construction} 69 80 Preliminary implementation in the Syntol framework. 70 81 At this step the software will just implement a single constructor. 71 \itemV{12}{18}{x}{\Slip} {Arrays and FIFO} 72 Implementation of the array contraction and FIFO construction algorithm. 73 Conversion of the input and output to the \xcoach format. 82 \itemL{30}{36}{d+x}{\Slip}{Process generation method}{10:0:9} 83 Final assessment of the method and improved version of the specification. 84 % 85 \itemV{6}{12}{d}{\Slip} {Arrays and FIFO} 86 Description and specification of the FIFO construction method 87 and local memory optimization algorithms. 88 \itemV{12}{18}{d+x}{\Slip} {Arrays and FIFO} 89 Preliminary implementation in the Bee framework. 90 Conversion of the input and output of Bee to the \xcoach format. 91 At this step, only memory optimizations will be available. 92 \itemL{18}{30}{d+x}{\Slip}{Arrays and FIFO}{10:0:9} 93 Final assessment of the method and improved version of the specification. 94 % 74 95 \itemV{18}{30}{d+x}{\Slip}{Non-polyhedral extension} 75 Extension of automatic parallelization and array contraction96 Extension of automatic parallelization and memory optimization 76 97 to non-polyhedral loops. Implementation in the Bee framework. 77 \itemL{30}{36}{ x}{\Slip} {Process/FIFO construction}{10:20:12}98 \itemL{30}{36}{d+x}{\Slip} {Non-polyhedral extension}{10:20:12} 78 99 Final release taking into account the feedbacks from the 79 100 demonstrator \STs.
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