Index: /anr/annexe-cv.tex
===================================================================
--- /anr/annexe-cv.tex	(revision 350)
+++ /anr/annexe-cv.tex	(revision 351)
@@ -114,4 +114,5 @@
     \end{itemize}
 \end{cvenv}
+%
 \begin{cvenv}
   {{Muller}{Olivier}{30}}
@@ -131,5 +132,5 @@
   {INRIA researcher }
   {PhD (1982)}
-  {{60}{\cite{Martin09c} \cite{Martin09d} \cite{Wolinski09a} \cite{RAFFIN:2010:INRIA-00539874:1}}}
+  {{50}{\cite{Martin09c} \cite{Martin09d} \cite{Wolinski09a} \cite{RAFFIN:2010:INRIA-00539874:1}}}
   \item[Course of Lectures]\mbox{}
        embedded system design
@@ -142,9 +143,22 @@
 %
 \begin{cvenv}
+{{Derrien}{Steven}{36}}
+{Associate Professor}
+{PhD (2002)}
+{{20}{\cite{sd:lomita}} \cite{sd:mmalpha} \cite{sd:hmmer} \cite{sd:rdisk}}
+\item[Course of Lectures]\mbox{}
+Principles of operating systems, Design of embedded systems, programming languages.
+\item[Projects]\mbox{}
+\begin{itemize}
+\item ANR-Biowic, 2009--
+\item Nano2012 S2S4HLS, 2009--
+\end{itemize}
+\end{cvenv} 
+%
+\begin{cvenv}
   {{Coussy}{Philippe}{36}}
   {Associate Professor}
   {PhD (2003)}
-
-  {{47}{\cite{COUSSY:2005:HAL-00077301:1} \cite{IEEEDT} \cite{HLSBOOK} \cite{DBLP:journals/dt/CoussyT09} \cite{gaut08} \cite{gaut08} \cite{DBLP:journals/dt/CoussyGMT09} \cite{DBLP:journals/vlsisp/ThabetCHM09}    }}
+  {{47}{\cite{COUSSY:2005:HAL-00077301:1} \cite{IEEEDT} \cite{HLSBOOK} \cite{DBLP:journals/dt/CoussyT09} \cite{gaut08} \cite{gaut08} \cite{DBLP:journals/dt/CoussyGMT09} \cite{DBLP:journals/vlsisp/ThabetCHM09}}}
   \item[Course of Lectures]\mbox{}
        Computer Architecture, programming language, operating systems,
@@ -159,9 +173,10 @@
     \end{itemize}
 \end{cvenv}
+%
 \begin{cvenv}
   {{Chavet}{Cyrille}{32}}
   {Associate Professor}
   {PhD (2007)}
-{{20}{\cite{CHAVET:2007:HAL-00153994:1} \cite{DBLP:conf/iccad/ChavetACCJUM07} \cite{DBLP:conf/glvlsi/ChavetCUM07} }
+{{20}{\cite{CHAVET:2007:HAL-00153994:1} \cite{DBLP:conf/iccad/ChavetACCJUM07} \cite{DBLP:conf/glvlsi/ChavetCUM07}}}
   \item[Course of Lectures]\mbox{}
        Parrallel programming, VHDL, real time programming, database networking 
@@ -171,4 +186,5 @@
     \end{itemize}
 \end{cvenv}
+%
 \begin{cvenv}
   {{Heller}{Dominique}{44}}
@@ -186,2 +202,3 @@
 \end{cvenv}
 %
+
Index: /anr/anr.bib
===================================================================
--- /anr/anr.bib	(revision 350)
+++ /anr/anr.bib	(revision 351)
@@ -980,2 +980,39 @@
     x-hal={inria-00539874},
 }
+
+@INBOOK{sd:mmalpha,
+  chapter = {High-Level Synthesis of Loops Using the Polyhedral Model: The MMAlpha Software},
+  pages = {215-230},
+  title = {High-Level Synthesis From Algorithm to Digital Circuit},
+  publisher = {Springer Netherlands},
+  year = {2008},
+  editor = {Philippe Coussy and Adam Morawiec},
+  author = {Steven Derrien and Sanjay Rajopadhye and Patrice Quinton and Tanguy Risset},
+  doi = {10.1007/978-1-4020-8588-8},
+  x-international-audience = {yes}, 
+  x-editorial-board = {yes},
+  x-proceedings = {yes},
+	x-hal = {no}
+}
+
+
+@article{sd:rdisk,
+    author= {Stéphane Guyetant and  Mathieu Giraud and  Ludovic L'Hours and  Steven Derrien and  Stephane Rubini and  Dominique Lavenier and  Frédéric Raimbault },
+    title= {{Cluster of Reconfigurable Nodes for Scanning Large Genomic Banks}},
+    journal= {Parallel Computing},
+    year ={2005}
+}
+
+@inproceedings{sd:lomita,
+    author= {M. Adeel Pasha and Steven Derrien and Olivier Sentieys},
+    title= {{A complete design-flow for the generation of ultra low-power wsn node architectures based on micro- tasking}},
+    booktitle = {Proceedings of the IEEE/ACM Design Automation Conference},
+    year= {2010}
+}
+
+@article{sd:hmmer,
+    author= {Steven Derrien and  Patrice Quinton},
+    title= {{ Hardware Acceleration of HMMER on FPGAs}},
+    journal= {Journal of Signal Processing Systems },
+    year ={2010},
+}
Index: /anr/section-consortium-people.tex
===================================================================
--- /anr/section-consortium-people.tex	(revision 350)
+++ /anr/section-consortium-people.tex	(revision 351)
@@ -42,5 +42,5 @@
 responsible        & Charot      & François      & INRIA researcher&SOC ASIP         & 12 & expertise in architecture, microarchitecture, SoC design. Participation to Task-1/2/4/8  \\\hline
 contributor         & Derrien      & Steven      & Associate professor&
-HLS compilation          & 12& expertise in architecture, microarchitecture, SoC design \\\hline
+HLS compilation          & 6& expertise in architecture, microarchitecture, SoC design \\\hline
 
 \peopletabularentry{\lip}
Index: /anr/section-ressources.tex
===================================================================
--- /anr/section-ressources.tex	(revision 350)
+++ /anr/section-ressources.tex	(revision 351)
@@ -42,7 +42,6 @@
   No specific equipment acquisition. 
 \item [Personnel costs] The faculty members involved in the project
-  are François Charot (INRIA researcher), Steven Derrien (associate
-  professor), Christophe Wolinski (professor) and Charles Wagner
-  (research engineer). The non-permanent personal required is a PhD
+  are François Charot (INRIA researcher) and Steven Derrien (associate
+  professor). The non-permanent personal required is a PhD
   student that will mainly work on ASIP generation. We are looking for
   a profile with strong informatic skills and good knowledge in