Index: /anr/annexe-autre-participation.tex =================================================================== --- /anr/annexe-autre-participation.tex (revision 355) +++ /anr/annexe-autre-participation.tex (revision 356) @@ -6,5 +6,5 @@ \newenvironment{autreprojettabular}{% - \noindent\begin{tabular}{|c|p{1.6cm}|c|p{3.75cm}|p{3.5cm}|p{1.6cm}|p{2.0cm}|}\hline + \noindent\begin{tabular}{|c|p{1.6cm}|c|p{5.0cm}|p{5.0cm}|p{4.6cm}|p{2.0cm}|}\hline Part. & Name & \raisebox{-2.8ex}{{\begin{minipage}[c]{0.8cm}\centering PM\\by\\year\\\end{minipage}}} @@ -18,8 +18,11 @@ \def\autreprojettabularentry#1#2#3#4#5#6#7{#1 & #2 & #3 & #4 & #5 & #6 & #7 \\\hline} +%\begin{landscape} +%\begin{figure} +\begin{small} +% \begin{autreprojettabular} - \autreprojettabularentry - {5}{Greiner}{4} + {2}{Greiner}{4} {Tsar, CATRENE, 695 k\euro} {Tera Scale ARchitecture} @@ -33,12 +36,11 @@ {04/01/2008 05/31/2011} \autreprojettabularentry - {3}{P\'etrot}{7} + {5}{P\'etrot}{\mustbecompleted{7 TIMA}} {3DIM3, CATRENE, 741 k\euro} {3D TSV Integration for MultiMedia and Mobile Applications} {\makebox{Dominique} Marron (STMicroelectronics)} - {7}{Nguyen}{8} {01/02/2009 31/01/2012} \autreprojettabularentry - {3}{P\'etrot}{4} + {5}{P\'etrot}{\mustbecompleted{4 TIMA}} {SoftSoC, MEDEA+, 500 k\euro} {Software for SoC} @@ -46,5 +48,5 @@ {1/03/2008 28/02/2011} \autreprojettabularentry - {3}{P\'etrot}{6} + {5}{P\'etrot}{\mustbecompleted{6 = 17}} {ComCas, CATRENE, 600 k\euro} {Communication-centric heterogeneous Multi-Core Architectures} @@ -52,8 +54,42 @@ {01/03/2009 28/02/2012} \autreprojettabularentry - {3}{Muller}{4} + {5}{Muller}{4} {iGlance, CATRENE, 550 k\euro} {Interactive Genius Look At Numerous Contemporary Events} {\makebox{Michel} Imbert (STMicroelectronics)} {01/07/2008 30/06/2011} +\autreprojettabularentry + {8}{Lemonier}{3} + {FORFOR, ANR Arpege, 305 k\euro} + {\mustbecompleted{TITRE (TRT)}} + {\makebox{Muller} (LEAT)} + {01/01/2008 31/12/2010} +\autreprojettabularentry + {8}{Lemonier}{4} + {FREIA, ANR Arpege, 280 k\euro} + {\mustbecompleted{TITRE (TRT)}} + {\makebox{Blondeau} (Amines)} + {01/01/2008 31/12/2010} +\autreprojettabularentry + {8}{Lemonier}{3} + {CHAPI, System@tic, 251 k\euro} + {\mustbecompleted{TITRE (TRT)}} + {\makebox{Lecluse} (Kalray)} + {01/12/2009 31/12/2012} +\autreprojettabularentry + {8}{Brelet}{\mustbecompleted{6 TRT}} + {PM, System@tic, \mustbecompleted{0 TRT} k\euro} + {\mustbecompleted{TITRE (TRT)}} + {\makebox{Vincent LEFFTZ} (Astrium)} + {01/01/2010 31/12/2012} +\autreprojettabularentry + {8}{Brelet}{\mustbecompleted{6 = 12}} + {PM, RTSIMEX ANR, \mustbecompleted{0 TRT} k\euro} + {\mustbecompleted{TITRE (TRT)}} + {\makebox{Fr\'ed\'eric Thomas} (OBEO)} + {01/01/2010 31/12/2012} \end{autreprojettabular} +% +\end{small} +%\end{figure} +%\end{landscape} Index: /anr/annexe-cv.tex =================================================================== --- /anr/annexe-cv.tex (revision 355) +++ /anr/annexe-cv.tex (revision 356) @@ -119,5 +119,5 @@ {Associate Professor} {PhD (2007)} - {{10}} + {{10}{}} \item[Course of Lectures]\mbox{} Computer Architecture, assembly language programming, FPGA @@ -203,3 +203,26 @@ \end{cvenv} % +\begin{cvenv} + {{Lemonier}{Fabrice}{43}} + {Research program manager} + {PhD (1996), Master in parallel computing (1992), EFREI Engineer (1991)} + {{3}{}} + \item[Projects]\mbox{} + \begin{itemize} + \item Coordinator of Teraops project (p\^ole de comp\'etitivit\'e System\verb+@+tic) to develop a heterogeneous manycore + \item Works on FOSFOR and PREIA ANR project on reconfigurable computing, and on CHAPI (p\^ole de comp\'etitivit\'e System\verb+@+tic) + \end{itemize} +\end{cvenv} +% +\begin{cvenv} + {{Brelet}{Paul}{28}} + {software developer} + {EFREI Engineer (2007)} + {{4}{}} + \item[Projects]\mbox{} + \begin{itemize} + \item Worked on toolset in MORPHEUS (ICT FP6) + \item Works on toolset in SOCKET (p\^ole de comp\'etitivit\'e System\verb+@+tic), toolset in RTSimex (ANR) + \end{itemize} +\end{cvenv} Index: /anr/annexe-reponse.tex =================================================================== --- /anr/annexe-reponse.tex (revision 355) +++ /anr/annexe-reponse.tex (revision 356) @@ -1,3 +1,5 @@ %\def\t{\\\hspace*{.5em}} +\def\mysubsection{\subsubsection} +\def\mysubsubsection#1{\subsubsection*{\underline{#1}}} \def\t{\\{$\bullet$}~} \def\sectionPpageP#1{section~\ref{#1} (page~\pageref{#1})\xspace} @@ -11,9 +13,9 @@ proposition. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Réponses séquentielles} -% -\subsubsection{Pertinence de la proposition au regard de l'appel à projet} +\mysubsection{Réponses séquentielles} +% +\mysubsubsection{Pertinence de la proposition au regard de l'appel à projet} Pas de faiblesse signalée. -\subsubsection{Qualité scientifique et technique de la proposition} +\mysubsubsection{Qualité scientifique et technique de la proposition} \begin{description} \item[Point 1 (\textit{non prise en compte des outils existants})]\mbox{} @@ -114,5 +116,5 @@ \end{description} % -\subsubsection{Qualité de la construction de la proposition} +\mysubsubsection{Qualité de la construction de la proposition} \begin{description} \item[Manque un industriel pour assurer la pérennité]\mbox{}\\ @@ -127,5 +129,5 @@ \end{description} % -\subsubsection{Impact global du projet} +\mysubsubsection{Impact global du projet} \begin{description} \item[Volonté de tout refaire]\mbox{}\\ @@ -158,5 +160,5 @@ \end{description} % -\subsubsection{Qualité du consortium} +\mysubsubsection{Qualité du consortium} \begin{description} \item[Xilinx n'a pas une part assez active]\mbox{}\\ @@ -171,5 +173,5 @@ \end{description} % -\subsubsection{Moyens humains et financiers} +\mysubsubsection{Moyens humains et financiers} \begin{description} \item[Incongruités de quelques demandes financiÚres]\mbox{}\\ @@ -185,5 +187,5 @@ \end{description} % -\subsubsection{Avis Général} +\mysubsubsection{Avis Général} \begin{description} \item[Déséquilibre entre l'ampleur du développement et les moyens]\mbox{}\\ @@ -208,7 +210,7 @@ % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{SynthÚse} -% -\subsubsection{Projet trop ambitieux} +\mysubsection{SynthÚse} +% +\mysubsubsection{Projet trop ambitieux} \label{trop:ambitieux} Par rapport au projet 2010, nous avons réduit la surface du projet de 20\% en nous @@ -245,5 +247,5 @@ \end{itemize} % -\subsubsection{Projet \& SoCLib} +\mysubsubsection{Projet \& SoCLib} \label{coach+soclib} {$\bullet$}\note{SL1} @@ -278,5 +280,5 @@ neutre. % -\subsubsection{Pérennité/dissémination du projet} +\mysubsubsection{Pérennité/dissémination du projet} \label{perennite+dissemination} L’arrivée de la société Magillem Design Services dans le consortium permettra de @@ -303,5 +305,5 @@ considérés comme les cibles privilégiés du projet. % -\subsubsection{Projet trop académique} +\mysubsubsection{Projet trop académique} \label{trop:academique} Le projet a été jugé trop académique. Ceci est un peu corrigé par l'arrivée de Index: /anr/anr.sty =================================================================== --- /anr/anr.sty (revision 355) +++ /anr/anr.sty (revision 356) @@ -35,5 +35,5 @@ \immediate\openout\supporter=tmp/anr-supporter.tex \def\letterOfInterest#1#2{{% - \let\subsection\relax% + \let\subsubsection\relax% \let\label\relax% \let\begin\relax% @@ -46,5 +46,5 @@ \let\shadowbox\relax% \immediate\write\supporter{% - \subsection{#1} \label{supp:\the\supportercnt}}% + \subsubsection{#1} \label{supp:\the\supportercnt}}% \immediate\write\supporter{% %\begin{center}\includegraphics[width=0.9\linewidth]{#2}\end{center}}% @@ -137,6 +137,6 @@ \def\@MDS{\ifx\MDS\disable{}\else\ifx\MDS\enable{\@partner}\else{\@leader}\fi\fi}% \begin{tabular}{|c|c|c|c|c|c|c|c|}\hline -\Sinria & \Slip & \Stima & \Subs & \Supmc & \Smds & \Sbull & \Sthales \\\hline -\@INRIA & \@LIP & \@TIMA & \@UBS & \@UPMC & \@MDS & \@BULL & \@THALES \\\hline +\Smds & \Supmc & \Subs & \Slip & \Stima & \Sinria & \Sbull & \Sthales \\\hline +\@MDS & \@UPMC & \@UBS & \@LIP & \@TIMA & \@INRIA & \@BULL & \@THALES \\\hline \end{tabular}\par } Index: /anr/anr.tex =================================================================== --- /anr/anr.tex (revision 355) +++ /anr/anr.tex (revision 356) @@ -42,6 +42,8 @@ \pagestyle{fancy} \lhead{\begin{minipage}{1.5cm}\includegraphics[width=\linewidth]{logo-anr}\vspace*{1mm}\end{minipage}} -\chead{\begin{minipage}{8cm}\small\center Programme Ing\'enierie num\'erique \& s\'ecurit\'e\\Edition 2010\vspace*{1mm}\end{minipage}} -\rhead{\begin{minipage}{5cm}\small\raggedleft Project COACH\\Scientific document\vspace*{1mm}\end{minipage}} +\chead{\begin{minipage}{8cm}\small\center Programme Ing\'enierie num\'erique +\& s\'ecurit\'e\\Edition 2011\vspace*{1mm}\end{minipage}} +\rhead{\begin{minipage}{5cm}\small\raggedleft Project COACH\\Document +scientifique\vspace*{1mm}\end{minipage}} \lfoot{\begin{minipage}{7cm}\small ANR-GUI-AAP-04 – Doc Scientifique 2011\end{minipage}} \cfoot{\begin{minipage}{5cm}\end{minipage}} @@ -53,5 +55,6 @@ \def\backbone{backbone infrastructure\xspace} \def\Backbone{Backbone infrastructure\xspace} -\def\hommemois{men*months\xspace} +\def\hommemoislong{men$\ast$months\xspace} +\def\hommemois{m.m\xspace} \def\xilinxcpu{ARM\xspace} \def\xilinxbus{AMBA\xspace} @@ -74,5 +77,6 @@ \def\inria{INRIA\xspace} \def\Sinria{\Sformat{INRIA}\xspace} %\def\irisa{INRIA/\-CAIRN\xspace} \def\Sirisa{\Sformat{INRI}\xspace} -\def\lip{ENS Lyon/LIP/Compsys\xspace} \def\Slip{\Sformat{LIP}\xspace} +\def\liplong{ENS Lyon/LIP/Compsys\xspace} +\def\lip{ENS Lyon\xspace} \def\Slip{\Sformat{LIP}\xspace} \def\tima{TIMA\xspace} \def\Stima{\Sformat{TIMA}\xspace} \def\ubs{LAB-STICC\xspace} \def\Subs{\Sformat{UBS}\xspace} @@ -155,5 +159,5 @@ \end{tabular} % -\setcounter{tocdepth}{1} +\setcounter{tocdepth}{2} \tableofcontents @@ -220,6 +224,6 @@ \begin{description} \item[partner] - \Sinria for \inria, \Slip for \lip, \Stima for \tima, \Subs for \ubs, - \Supmc for \upmc, \Sxilinx for \xilinx, \Sbull for \bull, \Sthales for \thales, + \Sinria for \inria, \Slip for \liplong, \Stima for \tima, \Subs for \ubs, + \Supmc for \upmc, \Sbull for \bull, \Sthales for \thales, and \Smds for \mds. \item[kind of the deliverable] @@ -269,7 +273,9 @@ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\appendix +%\appendix \newpage -\section{Bibliography} +\section{Annexes} +% % % % % % % % % % % % % % % % % % % % % % % % +\subsection{Bibliography} %\subsection{References} \anrdoc{Inclure la liste des références bibliographiques utilisées dans la @@ -279,19 +285,21 @@ \bibliography{anr} -\newpage\section{CV, resume}\input{annexe-cv.tex} - -\newpage\section{Staff involvement in other contracts}\input{annexe-autre-participation.tex} - -\newpage\section{Man power by partners and by deliverables} - \subsection{Partner 1: \mds} \label{table-livrables-mds} \input{table_mds_full.tex} - \subsection{Partner 2: \upmc} \label{table-livrables-upmc} \input{table_upmc_full.tex} - \subsection{Partner 3: \ubs} \label{table-livrables-usb} \input{table_ubs_full.tex} - \subsection{Partner 4: \lip} \label{table-livrables-lip} \input{table_inria_compsys_full.tex} - \subsection{Partner 5: \tima} \label{table-livrables-tima} \input{table_tima_full.tex} - \subsection{Partner 6: \inria} \label{table-livrables-inria} \input{table_inria_cairn_full.tex} - \subsection{Partner 7: \bull} \label{table-livrables-bull} \input{table_bull_full.tex} - \subsection{Partner 8: \thales}\label{table-livrables-thales}\input{table_thales_full.tex} - -\newpage\section{Effort tables} +% % % % % % % % % % % % % % % % % % % % % % % % +\newpage\subsection{CV, resume}\input{annexe-cv.tex} +\begin{landscape} +\newpage\subsection{Staff involvement in other contracts}\input{annexe-autre-participation.tex} +\end{landscape} +\newpage\subsection{Man power by partners and by deliverables} +\label{effort:by:partner:livrable} + \subsubsection{Partner 1: \mds} \label{table-livrables-mds} \input{table_mds_full.tex} + \subsubsection{Partner 2: \upmc} \label{table-livrables-upmc} \input{table_upmc_full.tex} + \subsubsection{Partner 3: \ubs} \label{table-livrables-ubs} \input{table_ubs_full.tex} + \subsubsection{Partner 4: \liplong} \label{table-livrables-inria_compsys} \input{table_inria_compsys_full.tex} + \subsubsection{Partner 5: \tima} \label{table-livrables-tima} \input{table_tima_full.tex} + \subsubsection{Partner 6: \inria} \label{table-livrables-inria_cairn} \input{table_inria_cairn_full.tex} + \subsubsection{Partner 7: \bull} \label{table-livrables-bull} \input{table_bull_full.tex} + \subsubsection{Partner 8: \thales} \label{table-livrables-thales} \input{table_thales_full.tex} +\newpage\subsection{Effort tables} +\label{effort:by:livrable} %\begin{small} \noindent\input{tmp/effort-par-livrable-1.tex} @@ -301,11 +309,11 @@ %\end{small} -\newpage\section{Prise en compte de l'évaluation 2010} -\input{annexe-reponse.tex} - -\newpage\section{Letters of interest} +\newpage\subsection{Letters of interest} \label{lettre-soutien} \input{tmp/anr-supporter.tex} +\newpage\subsection{Prise en compte de l'évaluation 2010} +\input{annexe-reponse.tex} + %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \end{document} Index: /anr/gantt.l =================================================================== --- /anr/gantt.l (revision 355) +++ /anr/gantt.l (revision 356) @@ -53,12 +53,12 @@ struct partner_def { char *key, *name, *fnfull, *fnshort; } partner_table[] = { { "UNKNOW" ,"relax" ,0 ,0 }, - { "inria" ,"inria" ,"table_inria_cairn_full.tex" ,"table_inria_cairn_short.tex" }, + { "mds" ,"mds" ,"table_mds_full.tex" ,"table_mds_short.tex" }, + { "upmc" ,"upmc" ,"table_upmc_full.tex" ,"table_upmc_short.tex" }, + { "ubs" ,"ubs" ,"table_ubs_full.tex" ,"table_ubs_short.tex" }, { "lip" ,"lip" ,"table_inria_compsys_full.tex","table_inria_compsys_short.tex" }, { "tima" ,"tima" ,"table_tima_full.tex" ,"table_tima_short.tex" }, - { "ubs" ,"ubs" ,"table_ubs_full.tex" ,"table_ubs_short.tex" }, - { "upmc" ,"upmc" ,"table_upmc_full.tex" ,"table_upmc_short.tex" }, + { "inria" ,"inria" ,"table_inria_cairn_full.tex" ,"table_inria_cairn_short.tex" }, { "bull" ,"bull" ,"table_bull_full.tex" ,"table_bull_short.tex" }, { "thales" ,"thales" ,"table_thales_full.tex" ,"table_thales_short.tex" }, - { "mds" ,"mds" ,"table_mds_full.tex" ,"table_mds_short.tex" }, { 0 ,0 ,0 ,0 }, }; Index: /anr/section-2.tex =================================================================== --- /anr/section-2.tex (revision 355) +++ /anr/section-2.tex (revision 356) @@ -1,11 +1,13 @@ Embedded systems (SoC and MPSoC) have become an inevitable evolution in the microelectronic industry. -Due to the exploding fabrication costs, the ASIC technology (Application Specific Integrated Circuits) -is not an option for SMEs (Small and Medium Enterprises). +The ASIC technology (Application Specific Integrated Circuits) +is not an option for markets with small series of products due to ROI. Fortunately, the new FPGA (Field Programmable Gate Array) components, -such as the Virtex5 family from \xilinx, or the Stratix4 family from \altera can implement a complete +such as the Virtex6 family from \xilinx, or the Stratix4 family from \altera can implement a complete multi-processor architecture on a single device. But the design of embedded system is a long and complex task that requires expertise in software, -software/hardware partionning, operating system, hardware design, VHDL/Verilog modeling. +software/hardware portioning, operating system, hardware design, VHDL/Verilog modeling. Only very few SMEs have these multiple expertises and are present on the embedded system market. +The corresponding development cost is high and it is not compliant with +specification or standard evolution (problem of flexibility). Furthermore, even small design shops in big companies are facing the same issue. \begin{center}\begin{minipage}{.8\linewidth}\textit{ @@ -74,6 +76,6 @@ unadapted to the current GPU based solutions. \parlf -Coach generates SoCs which are part of larger systems. Thus it is important to take - into account the existing industrial design flow. For this reason COACH will use the +COACH generates SoCs which are part of larger systems. Thus it is important to take +into account the existing industrial design flow. For this reason COACH will use the IP-XACT IEEE 1685 standard for packaging these generated SoCs. \begin{center}\begin{minipage}{.8\linewidth}\textit{ Index: /anr/section-consortium-desc.tex =================================================================== --- /anr/section-consortium-desc.tex (revision 355) +++ /anr/section-consortium-desc.tex (revision 356) @@ -11,175 +11,23 @@ The consortium is made of 8 partners: 5 academic and 3 industrial, which is well balanced for reaching the objectives (technical innovation and industrial evaluation for further exploitation). -Each academic partner is expert in a specific area and each industrial brings a different approach to the use of the tools: -\begin{itemize} -\item LIP6: MPSoC design and HLS -\item TIMA: Architecture, virtual prototyping, HLS -\item LAB-STICC: HLS, compilation -\item INRIA: ASIP design -\item LIP: compilation, polyhedral model, HPC -\item Magillem: IP-XACT and industrial flow integration -\item BULL: HPC -\item THALES: \mustbecompleted{XXX (MAGILEM TRT)} -\end{itemize} - -Thales will represent the FPGA users, BULL the HPC users, and Magillem the SoC integrators. - - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsubsection{\inria} - -INRIA, the French national institute for research in computer science -and control, operating under the dual authority of the Ministry of -Research and the Ministry of Industry, is dedicated to fundamental and -applied research in information and communication science and -technology (ICST). The Institute also plays a major role in technology -transfer by fostering training through research, diffusion of -scientific and technical information, development, as well as -providing expert advice and participating in international programs. -\parlf -By playing a leading role in the scientific community in the field and -being in close contact with industry, INRIA is a major participant in -the development of ICST in France. Throughout its eight research -centres in Rocquencourt, Rennes, Sophia Antipolis, Grenoble, Nancy, -Bordeaux, Lille and Saclay, INRIA has a workforce of 3 800, 2 800 of -whom are scientists from INRIA and INRIA's partner organizations such -as CNRS (the French National Center for Scientific Research), -universities and leading engineering schools. They work in 168 joint -research project-teams. Many INRIA researchers are also professors and -approximately 1 000 doctoral students work on theses as part of INRIA -research project-teams. -%\parlf -%INRIA develops many partnerships with industry and fosters technology -%transfer and company foundation in the field of ICST - some ninety -%companies have been founded with the support of INRIA-Transfert, a -%subsidiary of INRIA, specialized in guiding, evaluating, qualifying, -%and financing innovative high-tech IT start-up companies. INRIA is -%involved in standardization committees such as the IETF, ISO and the -%W3C of which INRIA was the European host from 1995 to 2002. -%\parlf -%INRIA maintains important international relations and exchanges. In -%Europe, INRIA is a member of ERCIM which brings together research -%institutes from 19 European countries. INRIA is a partner in about 120 -%FP6 actions and 40 FP7 actions, mainly in the ICST field. INRIA also -%collaborates with numerous scientific and academic institutions abroad -%(joint laboratories such as LIAMA, associated research teams, training -%and internship programs). - -The CAIRN group of INRIA Rennes -- Bretagne Atlantique study reconfigurable -system-on-chip, i.e. hardware systems whose configuration may change before or even during -execution. To this end, CAIRN has 13 permanent researchers and a variable number of PhD -students, post-docs and engineers. -CAIRN intends to approach reconfigurable architectures from three -angles: the invention of new reconfigurable platforms, the development -of associated transformation, compilation and synthesis tools, and the -exploration of the interaction between algorithms and architectures. -CAIRN is a joint team with CNRS, University of Rennes 1 and ENS Cachan. - -\subsubsection{\lip} -The Compsys group of Ecole Normale Sup\'erieure de Lyon is a project-team -of INRIA Rh\^one-Alpes and a part of Laboratoire de l'Informatique du -Parall\'elisme (LIP), UMR 5668 of CNRS. It has four permanent researchers -and a variable number of PhD students and post-docs. Its field of -expertise is compilation for embedded system, optimizing compilers -and automatic parallelization. Its members were among the initiators -of the polyhedral model for automatic parallelization and program -optimization generally. It has authored or contributed to -several well known libraries for linear programming, polyhedra manipulation -and optimization in general. It has strong industrial cooperations, notably -with ST Microelectronics and \thales. - - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsubsection{\tima} -The TIMA laboratory ("Techniques of Informatics and Microelectronics -for integrated systems Architecture") is a public research laboratory -sponsored by Centre National de la Recherche Scientifique (CNRS, UMR5159), -Grenoble Institute of Technology (Grenoble-INP) and Universit\'{e} Joseph Fourier -(UJF). -The research topics cover the specification, design, verification, test, -CAD tools and design methods for integrated systems, from analog and -digital components on one end of the spectrum, to multiprocessor -Systems-on-Chip together with their basic operating system on the other end. -\parlf -Currently, the lab employs 124 persons among which 60 PhD candidates, and runs -32 ongoing French/European funded projects. -Since its creation in 1984, TIMA funded 7 startups, patented 36 inventions -and had 243 PhD thesis defended. -\parlf -The System Level Synthesis Group (25 people including PhDs) is -involved in several FP6, FP7, CATRENE and ANR projects. -Its field of expertise is in CAD and architecture for Multiprocessor -SoC and Hardware/Software interface. - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsubsection{\ubs} - -The Lab-STICC (Laboratoire des Sciences et Techniques de l'Information, -de la Communication, et de la Connaissance), is a French CNRS laboratory -(UMR 3192) that groups 4 research centers in the west and south -Brittany: the Universit\'e de Bretagne-Sud (UBS), the Universit\'e de -Bretagne Occidentale (UBO), and Telecom Bretagne (ENSTB). -The Lab-STICC is composed of three departments: Microwave and equipments (MOM), -Digital communications, Architectures and circuits (CACS) and Knowledge, -information and decision (CID). The Lab-STICC represents a staff of 279 -peoples, including 115 researchers and 113 PhD students. -The scientific production during the last 4 years represents 20 -books, 200 journal publications, 500 conference publications, 22 -patents, 69 PhDs diploma. -\parlf -The UBS/Lab-STICC laboratory is involved in several national research -projects (e.g. RNTL : SystemC'Mantic, EPICURE - RNRT : MILPAT, ALIPTA, -A3S - ANR : MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, ICTER ...), -CMCU project (COSIP) and regional projects (e.g. ITR projects PALMYRE -...). It is also involved in European Project (e.g. ITEA/SPICES, -IST/AETHER ...). These projects are conducted through tight cooperation -with national and international companies and organizations (e.g. France -Telecom CNET, MATRA, CEA, ASTRIUM, \thales Com., \thales Avionics, AIRBUS, -BarCo, STMicroelectronics, Alcatel-Lucent ...). Results of those or former -projects are for example the high-level synthesis tool GAUT, the UHLS -syntax and semantics-oriented editor, the DSP power estimation tool -Soft-explorer or the co-design framework Design Trotter. -\parlf -The CACS department of the Lab-STICC (also referred as UBS/Lab-STICC), -located in Lorient, is involved in COACH. -The UBS/Lab-STICC is working on the design of complex electronic systems -and circuits, especially but not exclusively focussing on real-time -embedded systems, power and energy consumption optimization, high-level -synthesis and IP design, digital communications, hardware/software -co-design and ESL methodologies. The application targeted by the -UBS/Lab-STICC are mainly from telecommunication and multimedia domains -which enclose signal, image, video, vision, and communication processing. - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsubsection{\upmc} - -University Pierre et Marie Curie (UPMC) is the largest university in France (7400 -employees,38000 students). -The Laboratoire d'Informatique de Paris 6 (LIP6) is the computer science laboratory of -UPMC, hosting more than 400 researchers, under the umbrella of the CNRS (Centre National -de la Recherche Scientifique). -The \og System on Chip \fg Department of LIP6 consists of 80 people, including 40 PHD -students. -The research focuses on CAD tools and methods for VLSI and System on Chip design. -\\ -The annual budget is about 3 M{\texteuro}, and 1.5 M{\texteuro} are from research contracts. -The SoC department has been involved in several european projects :IDPS, EVEREST, OMI-HIC, -OMI-MACRAME, OMI-ARCHES, EUROPRO, COSY, Medea SMT, Medea MESA, Medea+ BDREAMS, Medea+ -TSAR. -\parlf -The public domain VLSI CAD system ALLIANCE, developped at UPMC is installed in more than -200 universities worldwide. -The LIP6 is in charge of the technical coordination of the SoCLib national project, and is -hosting the SoCLib WEB server. -The SoCLib DSX component was designed and developped in our laboratory. -It allows design space exploration and will the base of the $CSG$ COACH tools. -Moreover, the LIP6 developped during the last 10 years the UGH tool for high level -synthesis of control-dominated coprocessors. -This tool will be modified to be integrated in the COACH design flow. -\parlf -Even if the preferred dissemination policy for the COACH design flow will be the free -software policy, the SoC department is ready to support start-ups : -Six startup companies have been created by former -researchers from the SoC department of LIP6 between 1997 and 2002. +Each academic partner is expert in a few area and each industrial brings a +different approach to the use of the tools. +\parlf +The expertise domains of academic partners are +MPSoC design \& virtual prototyping (\upmc, \tima), +micro-architecture design (\upmc, \tima, \ubs), +HLS (\upmc, \tima, \ubs), +embedded OS (\tima), +compilation (\ubs, \lip), +polyhedral model (\lip), +HPC (\lip, \upmc) and +ASIP design (\inria). +These domains cover all the COACH aspects. +\parlf +The approach to the use of the tools of industrials are: +IP-XACT and industrial flow integration (\mds), +HPC (\bull) and +\mustbecompleted{XXX "par MAGILEM ou TRT"} (\thales). +\thales will represent the FPGA users, \bull the HPC users, and \mds the SoC integrators. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% @@ -205,4 +53,168 @@ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{\upmc} + +University Pierre et Marie Curie (UPMC) is the largest university in France (7400 +employees, 38000 students). +The Laboratoire d'Informatique de Paris 6 (LIP6) is the computer science laboratory of +UPMC, hosting more than 400 researchers, under the umbrella of the CNRS (Centre National +de la Recherche Scientifique). +The \og System on Chip \fg Department of LIP6 consists of 40 permanent +researchers and 40 PHD students. +The research focuses on CAD tools and methods for VLSI and System on Chip design. +\parlf +The SoC department has been involved in several projects: IDPS, EVEREST, +OMI-HIC/MACRAME/\-ARCHES, EUROPRO, COSY, Medea SMT/MESA/+, BDREAMS, SoCLib, TSAR. +It developed and maintains the public domain VLSI CAD system ALLIANCE that is installed in more than +200 universities worldwide. It is also in charge of the SoCLib technical +coordination and WEB server. +\parlf +Even if the preferred dissemination policy for the COACH design flow will be the free +software policy, the SoC department is ready to support start-ups : +Six startup companies have been created by former +researchers from the SoC department of LIP6 between 1997 and 2002. +%The annual budget is about 3 M{\texteuro}, and 1.5 M{\texteuro} are from research contracts. +%The SoCLib DSX component was designed and developped in our laboratory. +%It allows design space exploration and will the base of the $CSG$ COACH tools. +%Moreover, the LIP6 developed during the last 10 years the UGH tool for high level +%synthesis of control-dominated coprocessors. +%This tool will be modified to be integrated in the COACH design flow. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{\ubs} + +The Lab-STICC (Laboratoire des Sciences et Techniques de l'Information, +de la Communication, et de la Connaissance), is a French CNRS laboratory +(UMR 3192) that groups 4 research centers in the west and south +Brittany. +%: the Universit\'e de Bretagne-Sud (UBS), the Universit\'e de +%Bretagne Occidentale (UBO), and Telecom Bretagne (ENSTB). +%The Lab-STICC is composed of three departments: Microwave and equipments (MOM), +%Digital communications, Architectures and circuits (CACS) and Knowledge, +%information and decision (CID). +It represents a staff of 279 peoples, including 115 researchers and 113 PhD +students. +The scientific production during the last 4 years represents 20 +books, 200 journal publications, 500 conference publications, 22 +patents and 69 PHDs diploma. +\parlf +%The UBS/Lab-STICC laboratory is involved in several national research +%projects (e.g. RNTL : SystemC'Mantic, EPICURE - RNRT : MILPAT, ALIPTA, +%A3S - ANR : MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, ICTER ...), +%CMCU project (COSIP) and regional projects (e.g. ITR projects PALMYRE +%...). It is also involved in European Project (e.g. ITEA/SPICES, +%IST/AETHER ...). +The UBS/Lab-STICC laboratory is involved in several projects (SystemC'Mantic, +EPICURE, MILPAT, ALIPTA, A3S, MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, +ICTER, COSIP, PALMYRE, ITEA/SPICES, IST/AETHER. +%These projects are conducted through tight cooperation +%with national and international companies and organizations (e.g. France +%Telecom CNET, MATRA, CEA, ASTRIUM, \thales Com., \thales Avionics, AIRBUS, +%BarCo, STMicroelectronics, Alcatel-Lucent ...). +%Results of those or former +%projects are for example the high-level synthesis tool GAUT, the UHLS +%syntax and semantics-oriented editor, the DSP power estimation tool +%Soft-explorer or the co-design framework Design Trotter. +\parlf +The CACS department of the Lab-STICC (also referred as UBS/Lab-STICC), +located in Lorient, is involved in COACH. +The UBS/Lab-STICC is working on the design of complex electronic systems +and circuits, especially but not exclusively focussing on real-time +embedded systems, power and energy consumption optimization, high-level +synthesis and IP design, digital communications, hardware/software +co-design and ESL methodologies. The application targeted by the +UBS/Lab-STICC are mainly from telecommunication and multimedia domains +which enclose signal, image, video, vision, and communication processing. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{\liplong} +The Compsys group of Ecole Normale Sup\'erieure de Lyon is a project-team +of INRIA Rh\^one-Alpes and a part of Laboratoire de l'Informatique du +Parall\'elisme (LIP), UMR 5668 of CNRS. It has four permanent researchers +and a variable number of PhD students and post-docs. Its field of +expertise is compilation for embedded system, optimizing compilers +and automatic parallelization. Its members were among the initiators +of the polyhedral model for automatic parallelization and program +optimization generally. It has authored or contributed to +several well known libraries for linear programming, polyhedra manipulation +and optimization in general. It has strong industrial cooperations, notably +with ST Microelectronics and \thales. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{\tima} +The TIMA laboratory ("Techniques of Informatics and Microelectronics +for integrated systems Architecture") is a public research laboratory +sponsored by Centre National de la Recherche Scientifique (CNRS, UMR5159), +Grenoble Institute of Technology (Grenoble-INP) and Universit\'{e} Joseph Fourier +(UJF). +The research topics cover the specification, design, verification, test, +CAD tools and design methods for integrated systems, from analog and +digital components on one end of the spectrum, to multiprocessor +Systems-on-Chip together with their basic operating system on the other end. +\parlf +Currently, the lab employs 124 persons among which 60 PhD candidates, and runs +32 ongoing French/European funded projects. +Since its creation in 1984, TIMA funded 7 startups, patented 36 inventions +and had 243 PhD thesis defended. +\parlf +The System Level Synthesis Group (25 people including PhDs) is +involved in several FP6, FP7, CATRENE and ANR projects. +Its field of expertise is in CAD and architecture for Multiprocessor +SoC and Hardware/Software interface. + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsubsection{\inria} + +INRIA, the French national institute for research in computer science +and control, operating under the dual authority of the Ministry of +Research and the Ministry of Industry, is dedicated to fundamental and +applied research in information and communication science and +technology (ICST). +It has workforce of 3800 persons that work in 168 joint research project-teams. +\parlf +The Institute plays a major role in technology +transfer by fostering training through research, diffusion of +scientific and technical information, development, as well as +providing expert advice and participating in international programs. +Being in close contact with industry, INRIA is a major participant in +the development of ICST in France. +\parlf +The CAIRN group of INRIA Rennes -- Bretagne Atlantique study reconfigurable +system-on-chip, i.e. hardware systems whose configuration may change before or even during +execution. +To this end, CAIRN has 13 permanent researchers and a variable number of PhD +students, post-docs and engineers. +CAIRN intends to approach reconfigurable architectures from three +angles: the invention of new reconfigurable platforms, the development +of associated transformation, compilation and synthesis tools, and the +exploration of the interaction between algorithms and architectures. +CAIRN is a joint team with CNRS, University of Rennes 1 and ENS Cachan. +%By playing a leading role in the scientific community in the field and +%Throughout its eight research centres in Rocquencourt, Rennes, Sophia Antipolis, +%Grenoble, Nancy, Bordeaux, Lille and Saclay, INRIA has a workforce of 3800, 2800 +%of whom are scientists from INRIA and INRIA's partner organizations such as CNRS +%(the French National Center for Scientific Research), universities and leading +%engineering schools. +%They work in 168 joint research project-teams. +%Many INRIA researchers are also professors and approximately 1 000 doctoral +%students work on theses as part of INRIA research project-teams. +%\parlf +%INRIA develops many partnerships with industry and fosters technology +%transfer and company foundation in the field of ICST - some ninety +%companies have been founded with the support of INRIA-Transfert, a +%subsidiary of INRIA, specialized in guiding, evaluating, qualifying, +%and financing innovative high-tech IT start-up companies. INRIA is +%involved in standardization committees such as the IETF, ISO and the +%W3C of which INRIA was the European host from 1995 to 2002. +%\parlf +%INRIA maintains important international relations and exchanges. In +%Europe, INRIA is a member of ERCIM which brings together research +%institutes from 19 European countries. INRIA is a partner in about 120 +%FP6 actions and 40 FP7 actions, mainly in the ICST field. INRIA also +%collaborates with numerous scientific and academic institutions abroad +%(joint laboratories such as LIAMA, associated research teams, training +%and internship programs). + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsubsection{\bull} @@ -228,35 +240,75 @@ \thales is a world leader for mission critical information systems, with activities in 3 -core businesses: aerospace (with all major aircraft manufacturers as customers), defence, -and security (including ground transportation solutions). It employs 68000 people -worldwide, and is present in 50 countries. \thales Research \& Technology operates at the -corporate level as the technical community network architect, in charge of developing -upstream and \thales-wide R \& T activities, with vision and visibility. In support of -\thales applications, TRT's mission is also to anticipate and speed up technology transfer -from research to development in Divisions by developing collaborations in R\&T. \thales is -international, but Europe-centered. Research \& Development activities are disseminated, -and corporate Research and Technology is concentrated in Centres in France, the United -Kingdom and the Netherlands. A key mission of our R\&T centres is to have a bi-directional -transfer, or "impedance matching" function between the scientific research network and the -corresponding businesses. The TRT's Information Science and Technology Group is able to -develop innovative solutions along the information chain exploiting sensors data, through -expertise in: computational architectures in embedded systems, typically suitable for -autonomous system environments, mathematics and technologies for decision involving -information fusion and cognitive processing, and cooperative technologies including man -system interaction. -\parlf -The Embedded System Laboratory (ESL) of TRT involved in the COACH project is part of the -Information Science and Technology Group. Like other labs of TRT, ESL is in charge of -making the link between the needs from \thales business units and the emerging -technologies, in particular through assessment and de-risking studies. It has a long -experience on parallel architectures design, in particular on SIMD architectures used for +core businesses (aerospace, defence, security). +It employs 68000 people worldwide, and is present in 50 countries. +TRT (\thales Research \& Technology) operates at the corporate level as the technical +community network architect, in charge of developing upstream and \thales-wide +R\&T activities, with vision and visibility. +In support of \thales applications, TRT's mission is also to anticipate and +speed up technology transfer from research to development in Divisions by +developing collaborations in R\&T. +%\thales is international, but Europe-centered. +%Research \& Development activities are disseminated, and corporate Research and +%Technology is concentrated in Centres in France, the United Kingdom and the +%Netherlands. +%A key mission of our R\&T centres is to have a bi-directional transfer, or +%"impedance matching" function between the scientific research network and the +%corresponding businesses. +%The TRT's Information Science and Technology Group is able to develop innovative +%solutions along the information chain exploiting sensors data, through expertise +%in: computational architectures in embedded systems, typically suitable for +%autonomous system environments, mathematics and technologies for decision +%involving information fusion and cognitive processing, and cooperative +%technologies including man system interaction. +The Embedded System Laboratory (ESL) involved in the COACH project is part of +TRT, it is based in Centres (France). +\parlf +Like other labs of TRT, ESL is in charge of making the link between the needs +from \thales business units and the emerging technologies, in particular through +assessment and de-risking studies. +It has a long experience on parallel architectures design, in particular on SIMD architectures used for image processing and signal processing applications and on reconfigurable architectures. ESL is also strongly involved in studies on programming tools for these types of -architectures and has developed the SpearDE tool used in this project. The laboratory had -coordinated the FP6 IST MORPHEUS project on reconfigurable technology, being highly -involved in the associated programming toolset. The team is also involved in the FP6 IST -FET AETHER project on self-adaptability technologies and coordinates national projects on -MPSoC architecture and tools like the Ter\verb+@+ops project (P\^{o}le de -Comp\'{e}titivit\'{e} System\verb+@+tic) dedicated to the design of a MPSoC for intensive -computing embedded systems. - +architectures and has developed the SpearDE tool used in this project. +\parlf +The laboratory has coordinated the FP6 IST MORPHEUS project on reconfigurable +technology.% being highly involved in the associated programming toolset. +The team has also been involved in the FP6 IST FET AETHER project on +self-adaptability technologies and coordinated national projects on MPSoC +architecture and tools like the Ter\verb+@+ops project (P\^{o}le de +Comp\'{e}titivit\'{e} System\verb+@+tic). %dedicated to the design of a MPSoC for intensive computing embedded systems. +% +%\thales is a world leader for mission critical information systems, with activities in 3 +%core businesses: aerospace (with all major aircraft manufacturers as customers), defence, +%and security (including ground transportation solutions). It employs 68000 people +%worldwide, and is present in 50 countries. \thales Research \& Technology operates at the +%corporate level as the technical community network architect, in charge of developing +%upstream and \thales-wide R \& T activities, with vision and visibility. In support of +%\thales applications, TRT's mission is also to anticipate and speed up technology transfer +%from research to development in Divisions by developing collaborations in R\&T. \thales is +%international, but Europe-centered. Research \& Development activities are disseminated, +%and corporate Research and Technology is concentrated in Centres in France, the United +%Kingdom and the Netherlands. A key mission of our R\&T centres is to have a bi-directional +%transfer, or "impedance matching" function between the scientific research network and the +%corresponding businesses. The TRT's Information Science and Technology Group is able to +%develop innovative solutions along the information chain exploiting sensors data, through +%expertise in: computational architectures in embedded systems, typically suitable for +%autonomous system environments, mathematics and technologies for decision involving +%information fusion and cognitive processing, and cooperative technologies including man +%system interaction. +%\parlf +%The Embedded System Laboratory (ESL) of TRT involved in the COACH project is part of the +%Information Science and Technology Group. Like other labs of TRT, ESL is in charge of +%making the link between the needs from \thales business units and the emerging +%technologies, in particular through assessment and de-risking studies. It has a long +%experience on parallel architectures design, in particular on SIMD architectures used for +%image processing and signal processing applications and on reconfigurable architectures. +%ESL is also strongly involved in studies on programming tools for these types of +%architectures and has developed the SpearDE tool used in this project. The laboratory had +%coordinated the FP6 IST MORPHEUS project on reconfigurable technology, being highly +%involved in the associated programming toolset. The team has also been involved in the FP6 IST +%FET AETHER project on self-adaptability technologies and coordinated national projects on +%MPSoC architecture and tools like the Ter\verb+@+ops project (P\^{o}le de +%Comp\'{e}titivit\'{e} System\verb+@+tic) dedicated to the design of a MPSoC for intensive +%computing embedded systems. + Index: /anr/section-consortium-leader.tex =================================================================== --- /anr/section-consortium-leader.tex (revision 355) +++ /anr/section-consortium-leader.tex (revision 356) @@ -7,5 +7,5 @@ Emmanuel is contributing member in the IP-XACT working group of ACCELERA. In 2002-2005, Emmanuel was project manager of the project SystemC'mantic in -the former call RNTL. The main onbective was to set up a design and verification environment +the former call RNTL. The main objective was to set up a design and verification environment based on the new language SystemC and introducing new techniques of system level design. The partners of this project were Thales, CEA-LIST, TIMA, LESTER. @@ -14,5 +14,6 @@ environment based on SystemC. Emmanuel is a graduate of Conservatoire National des Arts et M\'etiers in the field of digital electronics for communications. -Emmanuel contributed to the publication of 10 white papers in the ESL design flot management area. -Emmanuel is one of the co-founders of Magillem. +Emmanuel contributed to the publication of 10 white papers in the ESL design +flow management area. +Emmanuel is one of the co-founders of \mds. Index: /anr/section-consortium-people.tex =================================================================== --- /anr/section-consortium-people.tex (revision 355) +++ /anr/section-consortium-people.tex (revision 356) @@ -25,10 +25,18 @@ \def\doAbre#1#2{{\mbox{#2$^{#1}$}}\xspace} +\def\TL#1{\textcolor{blue}{#1 (L)}} +The table in Figure~\ref{involved:people} lists the people involved in the +project. +The first column indicates the role of the person in the project +(C:global leader, L:local leader, M:contributor) +and a task number with a 'L' flag (e.g.: \TL{3}) in the last column indicates that the person +is its leader. +\begin{figure}[t!] \newenvironment{peopletabular}{% \let\PMnote\relax \def\PM{\doAbre{\ast}{PM}\gdef\PMnote{\doNote{\ast}{total of PM for the 3 years of the project.}}} - \let\COnote\relax \def\CO{\doAbre{a}{coor.}\gdef\COnote{\doNote{a}{coordinator.}}} - \let\REnote\relax \def\RE{\doAbre{b}{resp.}\gdef\REnote{\doNote{b}{responsible.}}} - \let\MEnote\relax \def\ME{\doAbre{c}{cont.}\gdef\MEnote{\doNote{c}{contributor.}}} - + \let\COnote\relax \def\CO{\textcolor{red}{C}}%{\doAbre{a}{coor.}\gdef\COnote{\doNote{a}{coordinator.}}} + \let\REnote\relax \def\RE{\textcolor{blue}{L}}%{\doAbre{b}{resp.}\gdef\REnote{\doNote{b}{responsible.}}} + \let\MEnote\relax \def\ME{M}%{\doAbre{c}{cont.}\gdef\MEnote{\doNote{c}{contributor.}}} +% \let\SPMnote\relax \def\SPM{\doAbre{A}{S. P. M.}\gdef\SPMnote{\doNote{A}{Strategic Project Manager.}}} \let\VPENGnote\relax \def\VPENG{\doAbre{B}{VP of eng.}\gdef\VPENGnote{\doNote{B}{VP of Engineering.}}} @@ -39,5 +47,5 @@ \let\DMnote\relax \def\DM{\doAbre{G}{D. M.}\gdef\DMnote{\doNote{G}{Department mananger.}}} %\let\RDENGnote\relax \def\RDENG{\doAbre{H}{R\&D eng.}\gdef\RDENGnote{\doNote{H}{R\&D Engineer.}}} - % +% \let\COMPnote\relax \def\COMP{\doAbre{1}{COMP}\gdef\COMPnote{\doNote{1}{Compilation.}}} \let\SWnote\relax \def\SW{\doAbre{2}{SW}\gdef\SWnote{\doNote{2}{SW development.}}} @@ -47,10 +55,11 @@ \let\MMnote\relax \def\MM{\doAbre{6}{M.M.}\gdef\MMnote{\doNote{6}{Memory management \& FIFO construction \& irregular extensions.}}} \let\AUPAnote\relax \def\AUPA{\doAbre{7}{A.P.}\gdef\AUPAnote{\doNote{7}{Process scheduling \& automatic parallelization.}}} - \noindent\hspace{-0.5cm}\begin{minipage}{\linewidth}\small\begin{tabular}{|p{0.7cm}|p{1.4cm}|p{1.7cm}|p{2.3cm}|p{3.9cm}|p{.5cm}|p{5cm}|}\hline - kind & Name & F. name & Position & Fields & \PM & Contribution to the project \\ + \noindent\hspace{-0.5cm}\begin{minipage}{\linewidth}\small\begin{tabular}{|c|p{1.4cm}|p{1.7cm}|p{2.3cm}|p{4.4cm}|p{.5cm}|p{4.5cm}|}\hline + & Name & F. name & Position & Fields & \PM & Contribution to the project \\ }{\end{tabular}\vspace{0.50ex}\\ \PMnote\COnote\REnote\MEnote - \SPMnote\VPENGnote\RENGnote\INREnote\EPnote\APnote\DMnote - \COMPnote\SWnote\SYSnote\VPnote\ARCHnote\MMnote\AUPAnote + \SPMnote\VPENGnote\RENGnote\INREnote\EPnote\APnote\DMnote - + \\ + \COMPnote\SWnote\SYSnote\VPnote\ARCHnote\MMnote\AUPAnote - --\\\end{minipage}} %{\hspace*{1cm}\scriptsize $^{\ast}$ total of PM for the 3 years of the project.}} @@ -61,9 +70,27 @@ \peopletabularentry{\mds} -\CO & Vaumorin & Emannuel & \SPM & ESL & 20& Task: 1 (\RE), \mustbecompleted{X, Y}, 8 (\RE)\\\hline +\CO & Vaumorin & Emannuel & \SPM & ESL & 20& Task: \TL{1}, \mustbecompleted{X, Y}, \TL{8}\\\hline \ME & Spasevski & Cyril & CTO & EDA & 6 & Task: \mustbecompleted{X, Y} \\\hline \ME & Guntz & St\'ephane & \VPENG & EDA & 6 & Task: \mustbecompleted{X, Y} \\\hline \ME & Lucas & Ronan & R\&D Engineer & Codesign & 9 & Task: \mustbecompleted{X, Y} \\\hline -\ME & Olivier & Garry & R\&D Engineer & SW dev. & 9 & Task: \mustbecompleted{X, Y} \\\hline +\ME & Olivier & Garry & R\&D Engineer & \SW & 9 & Task: \mustbecompleted{X, Y} \\\hline +%\end{peopletabular}\begin{peopletabular} +\peopletabularentry{\upmc} +\RE & Greiner & Alain & professor & SOC \ARCH \VP & 12 & Task: 1, \TL{2}, 3, 6 \\\hline +\ME & Aug\'{e} & Ivan & \AP & HLS \SW SOC HPC & 16 & Task: 1, 3, \TL{3}, 5, 6, 8 \\\hline +%\end{peopletabular}\begin{peopletabular} +\peopletabularentry{\ubs} +\RE & Coussy & Philippe & \mbox{\AP} & SOC HLS \ARCH \VP & 12 & Task: 1, 2, \TL{5}, \mustbecompleted{X, Y}, 8 \\\hline +\ME & Heller & Dominique & \mbox{\RENG} & \COMP HLS \ARCH & 8 & Task: \mustbecompleted{X, Y} \\\hline +\ME & Chavet & Cyrille & \mbox{\AP} & SOC HLS \ARCH & 4 & Task: \mustbecompleted{X, Y} \\\hline +%\end{peopletabular}\begin{peopletabular} +\peopletabularentry{\liplong} +\RE & Alias & Christophe & \mbox{\INRE} & \COMP HPC \MM & 15 & Task: 1, 2, \TL{4}, 8 \mustbecompleted{X, Y} \\\hline +\ME & Feautrier & Paul & \mbox{\EP} & \COMP \AUPA & 13 & Task: \mustbecompleted{X, Y} \\\hline +%\end{peopletabular}\begin{peopletabular} +\peopletabularentry{\tima} +\RE & P\'etrot & Fr\'ed\'eric& professor & SOC HLS OS \VP \ARCH & 12 & Task: 1, 2, 3, 5, 6 \\\hline +\ME & Muller & Olivier & \mbox{\AP} & SOC \VP HLS & 16 & Task: \mustbecompleted{X, Y} \\\hline +\ME & Prost-Boucle& Adrien & PhD candidate & SOC HLS & 24 & Task: \mustbecompleted{X, Y} \\\hline %\end{peopletabular}\begin{peopletabular} \peopletabularentry{\inria} @@ -71,26 +98,12 @@ \ME & Derrien & Steven & \mbox{\AP} & HLS \COMP \ARCH & 6 & Task: \mustbecompleted{X, Y} \\\hline %\end{peopletabular}\begin{peopletabular} -\peopletabularentry{\lip} -\RE & Alias & Christophe & \mbox{\INRE} & \COMP HPC \MM & 15 & Task: 1, 2, 4 (\RE), 8 \mustbecompleted{X, Y} \\\hline -\ME & Feautrier & Paul & \mbox{\EP} & \COMP \AUPA & 13 & Task: \mustbecompleted{X, Y} \\\hline +\peopletabularentry{\bull} +\RE & Nguyen & Huy-Nam & \DM & HPC \SYS \VP CAD & 9 & Task: 1, 2, \TL{6}, 7, 8 \\\hline %\end{peopletabular}\begin{peopletabular} -\peopletabularentry{\tima} -\RE & P\'etrot & Fr\'ed\'eric& professor & SOC HLS HPC OS \VP \ARCH & 12 & Task: 1, 2, 3, 5, 6 \\\hline -\ME & Muller & Olivier & \mbox{\AP} & SOC \VP HLS & 16 & Task: \mustbecompleted{X, Y} \\\hline -\ME & Prost-Boucle& Adrien & PhD candidate & SOC HLS & 24 & Task: \mustbecompleted{X, Y} \\\hline -%\end{peopletabular}\begin{peopletabular} -\peopletabularentry{\ubs} -\RE & Coussy & Philippe & \mbox{\AP} & SOC HLS \ARCH \VP & 12 & Task: 1, 2, 5 (\RE), \mustbecompleted{X, Y}, 8 \\\hline -\ME & Heller & Dominique & \mbox{\RENG} & \COMP HLS \ARCH & 8 & Task: \mustbecompleted{X, Y} \\\hline -\ME & Chavet & Cyrille & \mbox{\AP} & SOC HLS \ARCH & 4 & Task: \mustbecompleted{X, Y} \\\hline -%\end{peopletabular}\begin{peopletabular} -\peopletabularentry{\upmc} -\RE & Greiner & Alain & professor & SOC \ARCH \VP & 12 & Task: 1, 2 (\RE), 3, 6 \\\hline -\ME & Aug\'{e} & Ivan & \AP & HLS \SW SOC HPC & 16 & Task: 1, 3, 3 (\RE), 5, 6, 8 \\\hline -%\end{peopletabular}\begin{peopletabular} -\peopletabularentry{\bull} -\RE & Nguyen & Huy-Nam & \DM & HPC \SYS \VP CAD & 9 & Task: 1, 2, 6 (\RE), 7, 8 \\\hline -\end{peopletabular}\begin{peopletabular} \peopletabularentry{\thales} -\RE & Lemonier & Fabrice & ... & ... & ... & Task: \mustbecompleted{X, Y} 7 (\RE) \\\hline +\RE & Lemonier & Fabrice & \DM & SOC & 18 & Task: \mustbecompleted{X, Y} \TL{7} \\\hline +\ME & Brelet & Paul & \mbox{SW\,development} + & \SW & 18 & Task: 7,8 \\\hline \end{peopletabular} +\caption{\label{involved:people} People that participate to the project.} +\end{figure} Index: /anr/section-dissemination.tex =================================================================== --- /anr/section-dissemination.tex (revision 355) +++ /anr/section-dissemination.tex (revision 356) @@ -23,21 +23,20 @@ The COACH project will bring new scientific results in various fields, such as high level synthesis, hardware/software codesign, virtual prototyping, hardware oriented compilation techniques, -automatic parallelisation, etc. These results will be published in relevant International +automatic parallelization, etc. These results will be published in relevant International Conferences, namely DATE, DAC, or ICCAD. - +\\ More generally, the COACH infrastructure and the design flow supported by the COACH tools and libraries will be promoted by proposing tutorials on FPGA oriented system level synthesis -in various worshops and conferences (DATE, DAC, CODES+ISSS...). - +in various workshops and conferences (DATE, DAC, CODES+ISSS...). +\parlf Several COACH partners being members of the HiPEAC European Network of Excellence (High Performance and Embedded Architecture and Compilation), courses will be proposed for the HiPEAC summer school on Advanced Computer Architecture and Compilation for Embedded Systems. - -Following the general policy of the SoCLib platform, the COACH project will be an -open infrastructure, and the COACH tools and libraries will be available in the framework -of the SoCLib WEB server. This server will be maintened by the UPMC/LIP6 laboratory. - +\parlf +The COACH project will be an open infrastructure, and the COACH tools and libraries will be available via +a WEB server. This server will be maintained by the UPMC/LIP6 laboratory. +\\ On the standardization side, some effort will be made for analysing how the work around IP-XACT -could be donated for the evolution of the IEEE 1685 standard. Magillem is board member of +could be donated for the evolution of the IEEE 1685 standard. \mds is board member of Accellera, TRT, TIMA and LIP6 are members, so we'll try to have some influence and at least communicate on the fact that our solutions will be compatible with the standard. @@ -56,5 +55,5 @@ All software tools supporting the COACH design flow will be available as free software. All academic partners contributing to the COACH project agreed to distribute the ESL software -tools under the same GPL license as the SoCLib tools. +tools under the same GPL license. \item The SystemC simulation models for the hardware components @@ -75,6 +74,9 @@ synthesis tools developed in the COACH project. \item -\mds will propose a commercial version of COACH, integrated into Magillem tool suite and compatible with a standard IP-XACT flow. -This version will integrate some generic features, already available for production (some of them from standard Magillem pack, some other developped in COACH). Other COACH features will have to be tailored for the specifics of the customer framework and will generate service business. +\mds will propose a commercial version of COACH, integrated into \mds tool suite and compatible with a standard IP-XACT flow. +This version will integrate some generic features, already available for +production (some of them from standard \mds pack, some other developed in +COACH). Other COACH features will have to be tailored for the specifics of the +customer framework and will generate service business. \end{itemize} @@ -88,17 +90,29 @@ The interest for \mds in this project is multiple. \begin{itemize} -\item We will collaborate in experiments for the integration of High Level Synthesis engines into IP-XACT based flow. -This point will be very valuable because more and more system integrators are using or considering to use -HLS in their flow (e.g. Astrium, Airbus, etc.) -\item \mds has already a leading position in the usage of IP-XACT standard for managing innovative SoC design -methodologies. This project will allow to keep the advance in regards with competition by anticipating -the next generation platforms hosting mutli cores and programmable logic for coprocessors. -\item HPC is a topic that was not covered yet by \mds with its customers. Thanks to this project, \mds will -collaborate with BULL on this point and this will open us doors for new customers market. -\item This project has been set up for maximizing the industrial exploitation of results. The role of \mds will -be to ensure this objective and after the project, we expect a growing contribution for rising the turnover (2015: 2 new customers = 100keuros, -2016: 4 new customers = 250keuros, 2017: 5 new customers = 400Keuros). These numbers are not high but we tried to keep them realistic. -The return on investment is nevertheless important and we can also expect side effects of this project on sales with existing -customers and prospects interrested in the global magillem solution. +\item +We will collaborate in experiments for the integration of High Level Synthesis +engines into IP-XACT based flow. This point will be very valuable because more +and more system integrators are using or considering to use HLS in their flow +(e.g. Astrium, Airbus, etc.). +\item +\mds has already a leading position in the usage of IP-XACT standard for +managing innovative SoC design methodologies. This project will allow to keep +the advance in regards with competition by anticipating the next generation +platforms hosting multi-cores and programmable logic for coprocessors. +\item +HPC is a topic that was not covered yet by \mds with its customers. Thanks to +this project, \mds will collaborate with BULL on this point and this will open +us doors for new customers market. +\item +This project has been set up for maximizing the industrial exploitation of results. +The role of \mds will be to ensure this objective and after the project, we +expect a growing contribution for rising the turnover +(2015: 2 new customers = 100 k\euro, + 2016: 4 new customers = 250 k\euro, + 2017: 5 new customers = 400 k\euro). +These numbers are not high but we tried to keep them realistic. +The return on investment is nevertheless important and we can also expect side +effects of this project on sales with existing customers and prospects +interested in the global \mds solution. \end{itemize} @@ -108,15 +122,4 @@ HPC solutions. The main expectation from COACH is to derive a new component (fine-grain FPGA parallelism) to add to existing Bull HPC solutions. - -%\subsubsection*{Partner: \textit{\xilinx}} -%Computing power potential of our FPGA architectures -%growing very quickly on one side, and complexity of designs implemented -%using our FPGAs dramatically increasing on the other side, it is very -%interesting for us to get high level design methodologies progressing -%quickly and targetting our FPGAs in the most possible efficient way. -%\parlf -%\xilinx goal is to get COACH to generate bitstream optimized as much as possible for -%\xilinx FPGAs in order to both, validate the methodology on our FPGA families, and ease -%future work of our customers. \subsubsection*{Partner: \textit{\thales}} Index: /anr/section-etat-de-art.tex =================================================================== --- /anr/section-etat-de-art.tex (revision 355) +++ /anr/section-etat-de-art.tex (revision 356) @@ -25,5 +25,5 @@ By adapting architecture to the software, % (the opposite is done in the others families) FPGAs architectures enable better performance -(typically between x10 and x100 accelerations) +(typically an acceleration factor between 10 and 100) while using smaller size and less energy (and heat). However, using FPGAs presents significant challenges~\cite{hpc06a}. @@ -128,5 +128,5 @@ \item The parallelism is extracted from the initial specification. To get more parallelism or to reduce the amount of required memory in the SoC, the user -must re-write the algorithmic specification while there are techniques such as polyedric +must re-write the algorithmic specification while there are techniques such as polyhedral transformations to increase the intrinsic parallelism, \item While they support limited loop transformations like loop unrolling and loop @@ -213,5 +213,5 @@ Since hardware is inherently parallel, finding parallelism in sequential programs in an important prerequisite for HLS. The large FPGA chips of -today can accomodate much more parallelism than is available in basic blocks. +today can accommodate much more parallelism than is available in basic blocks. The polyhedral model is the ideal tool for finding more parallelism in loops. @@ -219,5 +219,5 @@ As a side effect, it has been observed that the polyhedral model is a useful tool for many other optimization, like memory reduction and locality -improvement. Itshould be noted +improvement. It should be noted that the polyhedral model \emph{stricto sensu} applies only to very regular programs. Its extension to more general programs is @@ -251,27 +251,11 @@ further releases. \parlf -In IP-XACT the flow automation and data constistency is ensured by generators, which +In IP-XACT the flow automation and data consistency is ensured by generators, which are program modules that process IP-XACT XML data into something useful for the design. They are key portable mechanism for encapsulating specialist design knowledge and enable designers to deploy specialist knowledge in their design. It is always possible to create generators in order to link several design or analysis tools -around a centric representation of metadata in IP-XACT. This kind of XML schema for -metadata management is a good solution for the federation of heterogeneous design domains +around a centric representation of meta-data in IP-XACT. This kind of XML schema for +meta-data management is a good solution for the federation of heterogeneous design domains (models, tools, languages, methodologies, etc.). -%\subsubsection{High Performance Computing} -%Accelerating high-performance computing (HPC) applications with field-programmable -%gate arrays (FPGAs) can potentially improve performance. -%However, using FPGAs presents significant challenges~\cite{hpc06a}. -%First, the operating frequency of an FPGA is low compared to a high-end microprocessor. -%Second, based on Amdahl law, HPC/FPGA application performance is unusually sensitive -%to the implementation quality~\cite{hpc06b}. -%Finally, High-performance computing programmers are a highly sophisticated but scarce -%resource. Such programmers are expected to readily use new technology but lack the time -%to learn a completely new skill such as logic design~\cite{hpc07a} . -%\\ -%HPC/FPGA hardware is only now emerging and in early commercial stages, -%but these techniques have not yet caught up. -%Thus, much effort is required to develop design tools that translate high level -%language programs to FPGA configurations. - Index: /anr/section-issues.tex =================================================================== --- /anr/section-issues.tex (revision 355) +++ /anr/section-issues.tex (revision 356) @@ -19,5 +19,5 @@ Industrial & 1,102 & 1,228 & 1,406 \\ High end & 177 & 188 & 207 \\\hline -Military/Aereo & 566 & 636 & 717 \\ +Military/Aeronautic & 566 & 636 & 717 \\ High end & 56 & 65 & 82 \\\hline\hline Total FPGA/PLD & 4,659 & 5,015 & 5,583 \\ @@ -28,20 +28,20 @@ % Microelectronic components allow integration of complex functions into products, increases -commercial attractivity of these products and improves their competitivity. +commercial attractiveness of these products and improves their competitiveness. \cite{rapport-ministere} estimates a 7\% growth of the micro-electronic market until 2015 at least. Multimedia and communication sectors have taken advantage from microelectronics facilities -thanks to the developpment of design methodologies and tools for embedded systems. -Unfortunately, the Non Recurring Engineering (NRE) costs involded in the design +thanks to the development of design methodologies and tools for embedded systems. +Unfortunately, the Non Recurring Engineering (NRE) costs involved in the design and manufacturing of ASICs is very high. An IC foundry costs several billions of euros and the fabrication of a specific circuit costs several millions. For example a conservative estimate for a 65nm ASIC project is 10 -million \$ . Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium +millions \$. Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium volume markets and the new trend for building the new generation products will be multi processors SoCs and -programmable logic for co-processsing. +programmable logic for co-processing. \\ According to a market survey (J-M. Chery, CTO ST Microelectronics at European NanoelectronicsForum 2010), -the global growth is 30 billon\$ between 2009-2013 for the multimedia and communication sectors; this is +the global growth is 30 billion\$ between 2009-2013 for the multimedia and communication sectors; this is 6 times more than all other domains like security, home automation or health. -The predominance of the multimedia and communication sectors are due to their being predominently a mass market. +The predominance of the multimedia and communication sectors are due to their being predominantly a mass market. % \subsubsection*{FPGAs and Embedded Systems} @@ -54,5 +54,5 @@ choice for low-to-medium volume applications. Since their introduction in the mid eighties, FPGAs evolved from a simple, -low-capacity gate array to devices (\altera STRATIX III, \xilinx Virtex V) that +low-capacity gate array to devices (\altera STRATIX III, \xilinx Virtex6) that provide a mix of coarse-grained data path units, memory blocks, microprocessor cores, on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement @@ -73,5 +73,5 @@ architectures and algorithms. These companies show up in different "traditional" applications and market segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC -emulation and prototyping, military/aereo etc. The HPC market size is estimated today by FPGA providers +emulation and prototyping, military/aeronautic etc. The HPC market size is estimated today by FPGA providers at 214\,M\$. This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion @@ -92,5 +92,5 @@ \begin{center}\begin{minipage}{.9\linewidth}\textit{ The aim of the COACH project is to integrate all these design steps into a single design framework -and to allow \textbf{pure software} developpers to design embedded systems. +and to allow \textbf{pure software} developers to design embedded systems. }\end{minipage}\end{center} % @@ -98,8 +98,9 @@ on Field Programmable Gate Array circuits (FPGA). Its aim is to propose solutions to the societal/economical challenges by -providing SMEs novel design capabilities enabling them to increase their -design productivity with design exploration and synthesis methods that are placed on top -of the state-of-the-art methods. -We believe that the combination of a design environment dedicated to software developpers +providing industrials using FPGAs and in particular SMEs novel design +capabilities enabling them to increase their design productivity with design +exploration and synthesis methods that are placed on top of the state-of-the-art +methods. +We believe that the combination of a design environment dedicated to software developers and FPGA targets, will allow small and even very small companies to propose embedded system and accelerating solutions Index: /anr/section-position.tex =================================================================== --- /anr/section-position.tex (revision 355) +++ /anr/section-position.tex (revision 356) @@ -23,19 +23,19 @@ %on Field Programmable Gate Array circuits (FPGA). %%% -\subsubsection*{Positionning in regards with the economical and social context} +\subsubsection*{Positioning in regards with the economical and social context} COACH will contribute to build an open design and run-time environment, including communication middleware and tools to support -developers in the production of embedded software, through all phases of the software lifecycle, +developers in the production of embedded software, through all phases of the software life cycle, from requirements analysis down to deployment and maintenance. More specifically, COACH focuses on: \begin{itemize} -\item High level methods and concepts (esp. requirements and architectural level) for system +\item High level methods and concepts (esp. Requirements and architectural level) for system design, development and integration, addressing complexity aspects and modularity. \item Open and modular design environments, enabling flexibility and extensibility by means of new or sector-specific tools and ensuring consistency and traceability along the -development lifecycle. +development life cycle. \item Light/agile methodologies and adaptive workflow providing a dynamic and adaptive environment, suitable for co-operative and distributed development. -\item Integration of the solutions and engines being developped into a state of the art SoC and system +\item Integration of the solutions and engines being developed into a state of the art SoC and system design flow, using the IP-XACT IEEE 1685 standard \end{itemize} @@ -52,5 +52,5 @@ %%% \parlf\noindent -\subsubsection*{Positionning and continuity with other projects} +\subsubsection*{Positioning and continuity with other projects} The COACH project will benefit from a number of previous recent projects: \begin{description} @@ -83,6 +83,6 @@ % The TSAR MEDEA+ project (2008-2010) targets the design of a scalable, coherent shared memory, multi-cores processor architecture, and uses the SoCLib - plaform for virtual prototyping. COACH will benefit from the synthesizable VHDL - models developped in the framework of TSAR (MIPS32 processor core, and RING interconnect). + platform for virtual prototyping. COACH will benefit from the synthesizable VHDL + models developed in the framework of TSAR (MIPS32 processor core, and RING interconnect). \item[BioWic] On the HPC application side, we also hope to benefit from the experience in @@ -137,5 +137,5 @@ among the initiators of the polyhedral model, a theory which serve to unify many parallelism detection and exploitation techniques for regular - programs. It is expected that the techniques developped by \lip for + programs. It is expected that the techniques developed by \lip for parallelism detection, scheduling \cite{Feau:92aa,Feau:92bb}, process construction \cite{Feau:96} and memory management \cite{bee} @@ -153,6 +153,6 @@ This project answer to the global statement of the call "INGENIERIE NUMERIQUE ET SECURITE (INS)" by proposing methods and tools for the design of application to be run on platforms of the next generation. -Inprovements can be expected for productivity, -time-to-market (automation and code generation) and safety (management of high level sepcifications down to implementation). +Improvements can be expected for productivity, +time-to-market (automation and code generation) and reliability (management of high level specifications down to implementation). In this call, the COACH project totally fulfills the objectives of the axis 2 "METHODES, OUTILS ET TECHNOLOGIES POUR LES SYSTEMES EMBARQUES". @@ -187,8 +187,8 @@ quality and reducing the design time and the cost of synthesised cryptographic devices. % -\subsubsection*{European and international positionning} +\subsubsection*{European and international positioning} % Finally, it is worth to note that this project covers priorities defined by the commission -experts in the field of Information Technolgies Society (IST) for Embedded +experts in the field of Information Technologies Society (IST) for Embedded Systems: \textit{ $<<$Concepts, methods and tools for designing systems dealing with systems complexity and allowing to apply efficiently applications and various products on embedded platforms, Index: /anr/section-project-description.tex =================================================================== --- /anr/section-project-description.tex (revision 355) +++ /anr/section-project-description.tex (revision 356) @@ -16,9 +16,9 @@ %\mbox{}\vspace*{1ex}\\ \includegraphics[width=1.0\linewidth]{architecture-hls} -\caption{\label{archi-hls} Software architecture of hardware accellerator synthesis} +\caption{\label{archi-hls} Software architecture of HAS (hardware Accelerator Synthesis)} %\end{figure}\begin{figure}\leavevmode\center %\mbox{}\vspace*{1ex}\\ \includegraphics[width=.65\linewidth]{architecture-hpc} -\caption{\label{archi-hpc} Performance analysis of a HPC partitionning} +\caption{\label{archi-hpc} Performance analysis of a HPC partitioning} \end{figure} % @@ -59,5 +59,5 @@ accept the same C++ description and on the other hand make possible their chaining. The front-end tools read a \xcoach description and generate -a new \xcoach description that exibits more parallelism or implement +a new \xcoach description that exhibits more parallelism or implement specific instructions for ASIP. The back-end tools read an \xcoach description and generate an \xcoachplus description. This is an \xcoach @@ -70,5 +70,5 @@ In addition to digital system design, HPC requires a supplementary partitioning step presented in figure~\ref{archi-hpc}. The designer -splits the initial application (tag 1) in two parts: one still on the PC and the +splits the initial application (tag 1) into two parts: one still on the PC and the other running in a FPGA plugged on the PCI/X PC bus. The two parts exchange data through communication primitives (tag 2) implemented in a library. @@ -83,5 +83,5 @@ This task relates to the monitoring of the COACH project. \item[Task-2: \textit{\Backbone}] This task tackles the fundamental points of the - project such as the defintion of the COACH inputs and outputs, + project such as the definition of the COACH inputs and outputs, the internal formats (i.e. \xcoach and \xcoachplus) and their associated tools, the architectural templates and the design flow. @@ -96,15 +96,15 @@ High-Level Synthesis of data dominated description and HLS of control dominated description. - This task contains also the development of a frequency adaptator + This task contains also the development of a frequency adapter that will allow the coprocessors to meet processor and bus frequency constraints. \item[Task-6: \textit{PC/FPGA communication middleware}] This task pools the features dedicated to HPC. These are mainly the - validation of the partitioning (see figure~\ref{archi-hpc}), the sytem drivers for + validation of the partitioning (see figure~\ref{archi-hpc}), the system drivers for both PC and FPGA-SoC sides, the hardware communication components and the support for dynamic partial reconfiguration. \item[Task-7: \textit{Industrial demonstrators}] This task groups the demonstrators of the COACH project. - Most of them are industrial applications that will be developped within + Most of them are industrial applications that will be developed within the COACH framework. Others consist in integrating the COACH framework as a driver of @@ -138,5 +138,5 @@ \item $T2$ drives all the tasks ($T3$, $T4$, $T5$, $T6$) and is at the heart of the COACH project. -\item The demonstrators developped in $T7$, of course strongly depend on the achievements +\item The demonstrators developed in $T7$, of course strongly depend on the achievements of the previous tasks ($T2$, $T3$, $T4$, $T5$, $T6$). \item $T8$ and $T1$ depend on and impact all the other tasks. @@ -144,6 +144,8 @@ This organisation offers enough robustness to insure the success of the project, the only critical task in this chart being $T2$. \label{xcoach-problem} -However, the partners met 12 times (a one-day meeting per month) during the last year. -Ten meeting were dedicated to preliminary technical discussions, including a tentative specification -of {\tt xcoach}. The other meetings were dedicated to the preparation of the present proposal. +%However, the partners met 12 times (a one-day meeting per month) during the last year. +%Ten meeting were dedicated to preliminary technical discussions, including a tentative specification +%of {\tt xcoach}. The other meetings were dedicated to the preparation of the present proposal. +However, the partners had 10 one-day meetings where a preliminary draft of the +\xcoach format was defined. This makes this task less critical. Index: /anr/section-project-management.tex =================================================================== --- /anr/section-project-management.tex (revision 355) +++ /anr/section-project-management.tex (revision 356) @@ -12,5 +12,5 @@ Each task leader has to report on the main high-lights, major opportunities and problems according to the work-plan. -The redaction of the 6-month reports is the responsability of the steering committee. +The redaction of the 6-month reports is the responsibility of the steering committee. Therefore, each Partner has the responsibility to monthly inform the task Leaders of the current development of the \ST he is in charge of. @@ -23,9 +23,17 @@ \item[Management of knowledge, Intellectual Property Right (IPR) and Results Exploitation] -The partners will have to work under eventual NDA constraints. -Prior Intellectual Property remains property of the concerned partners. -The exploitation of the results obtained in the project and by each partner involved in the consortium will -follow the rules written in the articles of the Consortium Agreement accepted and signed by -each partner at most 6 months after the project kick-off. +%The partners will have to work under eventual NDA constraints. +%Prior Intellectual Property remains property of the concerned partners. +%The exploitation of the results obtained in the project and by each partner involved in the consortium will +%follow the rules written in the articles of the Consortium Agreement accepted and signed by +%each partner at most 6 months after the project kick-off. +%To manage the exploitation and dissemination plan within the project, six +%monthly meetings will analyze the intentions from the consortium (patent, publication...). +The partners will sign and accept the Consortium Agreement at most 6 months +after the project kick-off. It will +1) eventually set NDA constraints on industrial demonstrators, +2) fix the intellectual properties of both prior and created intellectual properties, +3) define the rules of exploitation of the results obtained in the project. +\\ To manage the exploitation and dissemination plan within the project, six monthly meetings will analyze the intentions from the consortium (patent, publication...). @@ -53,5 +61,7 @@ \item[Project follow-ups] -The basic communication between single project partners will be carried out by means of an Information System (web site), which will be developed and introduced at the very beginning of the project implementation. +The basic communication between single project partners will be carried out by +means of an Information System (web site), which will be developed and +introduced at the very beginning of the project implementation. All scientific and administrative data related to the project will be collected and treated within a specific e-management plate-form accessible directly by the project web Index: /anr/section-project-task-schedule.tex =================================================================== --- /anr/section-project-task-schedule.tex (revision 355) +++ /anr/section-project-task-schedule.tex (revision 356) @@ -92,5 +92,5 @@ Because all the HAS tools rely on it, the \xcoach format specification is a crucial step. - There are no work-around but as mentionned in section~\ref{xcoach-problem} + There are no work-around but as mentioned in section~\ref{xcoach-problem} (page~\pageref{xcoach-problem}) the five academic partners have worked on it for a full year and a preliminary document already exists. @@ -108,5 +108,5 @@ Indeed the \altera \& \xilinx architectural templates being architecturally close of the neutral architectural template, an efficient software/hardware partition - on the neutral architectural template is also an efficient on the other + on the neutral architectural template is also efficient on the other architectural templates. The project will allow an experimental verification of this assumption. @@ -134,5 +134,5 @@ % virtual prototyping. \end{description} -\parlf +% Finally the list of all the deliverables is presented on figure~\ref{all-delivrables}. \begin{figure}[t]\leavevmode\center Index: /anr/section-ressources.tex =================================================================== --- /anr/section-ressources.tex (revision 355) +++ /anr/section-ressources.tex (revision 356) @@ -32,244 +32,403 @@ devra être justifiée. \end{itemize}} - +% \def\resstablestyletitle#1{\begin{small}{\textit{#1}}\end{small}} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Partner 1: \inria} - -\begin{description} -\item [Equipment] - No specific equipment acquisition. -\item [Personnel costs] The faculty members involved in the project - are François Charot (INRIA researcher) and Steven Derrien (associate - professor). The non-permanent personal required is a PhD - student that will mainly work on ASIP generation. We are looking for - a profile with strong informatic skills and good knowledge in - computer architecture. - \parlf - The table below summarizes the manpower in \hommemois by tasks for both permanent and - non-permanent personnels. The detail by deliverables is given in - annexe~\ref{table-livrables-inria} (page \pageref{table-livrables-inria}). - The non-permanent personnels costs represent {48\%} of the personnal - costs. The requested funding for non permanent personnels is 100\% of - the total ANR requested funding. - \begin{center}\input{table_inria_cairn_short.tex}\end{center} -\item [Subcontracting] - No subcontracting costs. -\item [Travel] - The travel costs are associated to project meeting as well as participation to - conferences. The travel costs are estimated to {7,5\%} of the total - requested ANR funding. -\item [Expenses for inward billing] - The costs justified by internal invoicing procedures are evaluated to 4\% of the total - requested ANR funding. -\end{description} - - -\subsection{Partner 2: \lip} - -\begin{description} -\item [Equipment] - No specific equipment acquisition. The costs for depreciation of - workstations is evaluated to 4\% of the total requested ANR funding. -\item [Personnel costs] The faculty members involved in the project - are Christophe Alias (INRIA researcher) and Paul Feautrier (emeritus - professor at ENS-Lyon). The non-permanent personel required is a - post-doc that will work on FIFO construction, then on extensions of - process construction and memory optimization to non-polyhedral - loops. We are looking for a candidate with both theoretical and - practical skills, that will be able to get a sufficient - understanding of the polyhedral techniques to produce a working - implementation. - \parlf - The table below summarizes the \hommemois by tasks for both permanent - and non-permanent personnels. - Annexe~\ref{table-livrables-lip} (page \pageref{table-livrables-lip}) - details this table at the deliverable level. - The effort of permanent personnels represents 61\% of - the total effort. The non-permanent personnels costs represents - 52\% of the personal costs. The requested funding for non permanent - personnels is 100\% of the total ANR requested - funding. - \begin{center}\input{table_inria_compsys_short.tex}\end{center} -\item [Subcontracting] - No subcontracting costs. -\item [Travel] - The travel costs are associated to project meeting as well as - participation to conferences. The travel costs are estimated to 20\% - of the total requested ANR funding. -\item [Expenses for inward billing] - The costs justified by internal invoicing procedures are evaluated - to 4\% of the total requested ANR funding. -\end{description} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Partner 3: \tima} - -\begin{description} -\item [Equipment] - No specific equipment acquisition. -\item [Personnel costs] - The permanent personnels involved in the project are professor and associate professor - (Fr\'ed\'eric P\'etrot and Olivier Muller). - The non permanent personnels are Phd students and post-doc researchers. - Related costs are estimated in \hommemois. - One phd student (Adrien Prost-Boucle), funded by the French ministry of research, will - be working on the project. - One 100\% funded phd student will be hired in September 2011. A post-doc researcher will - be hired at the end of 2012 for one year. - The PhD student will mainly work on the evolution of UGH HLS tool. Thus, we are looking - for a profile with strong informatic skills and good knowledge in computer architecture. - The post-doc will mainly work on HPC. The required profile - will be more oriented on computer architecture and advanced digital design. - \parlf - The table below summarizes the man power in \hommemois by tasks for both permanent and - non-permanent personnels. The detail by deliverables is given in - annexe~\ref{table-livrables-tima} (page \pageref{table-livrables-tima}). - The effort of permanent personnels represents 50\% of the total effort. - The requested funding for non permanent personnels is 86\% of the total ANR requested - funding. - \begin{center}\input{table_tima_short.tex}\end{center} -\item [Subcontracting] - No subcontracting costs. -\item [Travel] - The travel costs are associated to project meeting as well as participation to - conferences. The travel costs are estimated to 10\% of the total requested ANR funding. -\item [Expenses for inward billing] - The costs justified by internal invoicing procedures are evaluated to 4\% of the total - requested ANR funding. -\end{description} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Partner 4: \ubs} - -\begin {description} -\item [Equipment] - In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA - developpement boards. The cost for these FPGA boards is estimated to 3\% of the total - ANR funding. -\item [Personnel costs] - The faculty members involved in the project are associate professors (Philippe COUSSY, - Cyrille CHAVET) or research engineers (Dominique HELLER). All non-permanent personnel - costs are estimated in \hommemois for senior researchers (post-doc or research - engineers). - \parlf - The table below sumarizes the man power in \hommemois by tasks for both permanent and - non-permanent personnels. The detail by deliverables is given in - annexe~\ref{table-livrables-usb} (page \pageref{table-livrables-usb}). - The non-permanent personnels costs represent 50\% of the personnal costs. - The requested funding for non permanent personnels is about 83\% of the total ANR - requested funding. - \begin{center}\input{table_ubs_short.tex}\end{center} -\item [Subcontracting] - No subcontracting costs. -\item [Travel] - The travel costs are associated to management and meeting as well as participation to - conferences. The travel costs are estimated to 10\% of the total requested ANR funding. -\item [Expenses for inward billing] - The costs justified by internal invoicing procedures are evaluated to 4\% of the total - requested ANR funding. -\end {description} - - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Partner 5: \upmc} - -\begin{description} -\item[Equipment] - No specific equipment acquisition is required for this project. - The costs for depreciation of workstations and pre-existing FPGA boards are evaluated - to 7\% of the total requested ANR funding. -\item[Personnel costs] - The permanent personnels involved in the project are professors or assistant - processors (Alain Greiner and Ivan Aug\'e). - All non permanent personnel costs are estimated in \hommemois for senior researchers - (post-doc or research engineers). - The table below sumarizes the man power by tasks in \hommemois for both permanent and - non-permanent personnels. - The detail by deliverables is given in annexe~\ref{table-livrables-upmc} (page \pageref{table-livrables-upmc}). - The non-permanent personnels costs (24 \hommemois) represent 46\% of the personnal costs. - The requested funding for non permanent personnels is 79\% of the total ANR - requested funding. - \begin{center}\input{table_upmc_short.tex}\end{center} -\item[Subcontracting] - No subcontracting costs. -\item[Travel] - The travel costs are associated to management and coordination meeting as - well as participation to conferences. The travel costs are estimated - to 10\% of the total requested ANR funding. -\item[Expenses for inward billing] - The costs justified by internal invoicing procedures are evaluated to 4\% - of the total requested ANR funding. -\end{description} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\subsection{Partner 6: \mdslong} - -\begin{description} -\item[Equipment] - No specific equipment acquisition is required for this project. -\item[Personnel costs] +% +\def\ressources#1#2#3#4#5{{% + \def\tmp{} + \begin{description} + \setlength{\itemsep}{1pt} + \setlength{\parskip}{0pt} + \setlength{\parsep}{0pt} + \item[Equipment] + \def\cont{#2} + \ifx\cont\tmp\def\cont{No specific equipment acquisition is required for this project.}\fi + \cont + \item[Personnel costs] + #3\\ + \begin{minipage}{\linewidth}\center\input{table_#1_short.tex}\end{minipage} + \item[Subcontracting] No subcontracting costs. + \item[Travel] + The travel costs are associated to project meeting as well as participation to + conferences. The travel costs are estimated to #4\% of the total requested ANR funding. + \item[Expenses for inward billing] + \def\cont{#5} + \ifx\cont\tmp\def\cont{None.}\else\def\cont{% + The costs justified by internal invoicing procedures are evaluated + to #5\% of the total requested ANR funding.}\fi + \cont + %\item[Other working costs] None + \end{description} +}} + +\newcount\mycnt +\def\AcademicPersonalCost#1#2#3#4#5#6#7{ + \mycnt=#4\multiply\mycnt100\divide\mycnt#3 + The #2 effort is \textbf{#3} \hommemois, the table below details it by tasks and the + table in annexe~\ref{table-livrables-#1} (page \pageref{table-livrables-#1}) + details it by deliverables. + The permanent personnels are #5. + The effort due to the non permanent personnels is \textbf{#4} \hommemois + (\textbf{\the\mycnt\%} of the total effort). + %All non permanent personnel costs are estimated in \hommemois for senior researchers (post-doc or research engineers). + The requested funding for non permanent personnels is \textbf{#6\%} of the total ANR + requested funding. + #7 +} +\def\ressourcesForAcademic#1#2#3#4#5{ + \ressources{#1}{#2}{\AcademicPersonalCost{#1}#3}{#4}{#5} +} +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% + +The global effort is 358 \hommemois (\hommemoislong), +the part of academic partners is 236 \hommemois (66\% of the global effort) +and the part of the industrial partners is 122 \hommemois (\textbf{34\%} of the +global effort). +The tables of annexe~\ref{effort:by:livrable} gives this global effort by deliverables, +those of annexe~\ref{effort:by:partner:livrable} shows this global effort by partner and +deliverables.\\ +\textbf{NOTICE:} In these tables and in the following sections the units is the +\hommemois of a senior researcher (post-doc or research engineers). + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsection{Partner 1: \mdslong} +\ressources{mds} + {} + { \mds employees involved in the project are permanent managers, engineers and PhD graduates. The man power detail in \hommemois by deliverables is given in annexe~\ref{table-livrables-mds} (page \pageref{table-livrables-mds}). - and a sumary by task in the following table. - \begin{center}\input{table_mds_short.tex}\end{center} -\item[Subcontracting] - No subcontracting costs. -\item[Travel] - The travel costs are associated to project meeting as well as participation to - conferences. The travel costs are estimated to 2\% of the total requested ANR funding. -\item[Expenses for inward billing] none -\item[Other working costs] none -\end{description} - + and a summary by task in the following table. + \mustbecompleted{\\MDS: Vous n'etes dans aucuns projets annexe 7.3 ?} + } + {2} + {} +% +% \begin{description} +% \item[Equipment] +% No specific equipment acquisition is required for this project. +% \item[Personnel costs] +% \mds employees involved in the project are permanent managers, engineers and PhD graduates. +% The man power detail in \hommemois by deliverables is given in +% annexe~\ref{table-livrables-mds} (page \pageref{table-livrables-mds}). +% and a sumary by task in the following table. +% \begin{center}\input{table_mds_short.tex}\end{center} +% \item[Subcontracting] +% No subcontracting costs. +% \item[Travel] +% The travel costs are associated to project meeting as well as participation to +% conferences. The travel costs are estimated to 2\% of the total requested ANR funding. +% \item[Expenses for inward billing] none +% \item[Other working costs] none +% \end{description} + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsection{Partner 2: \upmc} +\ressourcesForAcademic + {upmc} + { In order to validate the COACH design flow, \upmc will buy FPGA development + boards (especially 1 PCI/E FPGA \xilinx board). + The cost for these boards is estimated to 4500 \euro (3\% of the total ANR funding).} + {{\upmc}{52}{24}{Alain Greiner and Ivan Aug\'e}{87}{ + We are looking for a profile with strong skills in SW development and good + knowledge in SoC design and virtual prototyping. + }} + {7}{3.5} +% +% \begin{description} +% \item[Equipment] +% In order to validate the COACH design flow, \upmc will buy FPGA development +% boards (especially 1 PCI/E FPGA \xilinx board). +% The cost for these boards is estimated to 6 k\euro (4\% of the total ANR funding). +% \item[Personnel costs] +% The permanent personnels involved in the project are professors or assistant +% professors (Alain Greiner and Ivan Aug\'e). +% All non permanent personnel costs are estimated in \hommemois for senior researchers +% (post-doc or research engineers). +% The table below sumarizes the man power by tasks in \hommemois for both permanent and +% non-permanent personnels. +% The detail by deliverables is given in annexe~\ref{table-livrables-upmc} (page \pageref{table-livrables-upmc}). +% The non-permanent personnels costs (24 \hommemois) represent 46\% of the personnal costs. +% The requested funding for non permanent personnels is 79\% of the total ANR +% requested funding. +% \begin{center}\input{table_upmc_short.tex}\end{center} +% \item[Subcontracting] +% No subcontracting costs. +% \item[Travel] +% The travel costs are associated to management and coordination meeting as +% well as participation to conferences. The travel costs are estimated +% to 10\% of the total requested ANR funding. +% \item[Expenses for inward billing] +% The costs justified by internal invoicing procedures are evaluated to 4\% +% of the total requested ANR funding. +% \end{description} + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\def\t{\hspace*{.5cm}} +\subsection{Partner 3: \ubs} +\ressourcesForAcademic + {ubs} + { In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA + development boards. The cost for these FPGA boards is estimated to 3\% of the total + ANR funding. + \mustbecompleted{INCOHERENCE avec SITE ANR} + } + {{\ubs}{48}{24}{Philippe COUSSY, Cyrille CHAVET and Dominique HELLER}{83}{ + \mustbecompleted{\\UBS: A) manque 1 profil ici, B) dans annexe 7.2 il ne faut que 5 + publis de moins de 5 ans, C) Vous n'etes dans aucuns projets annexe 7.3 ?} + \mustbecompleted{\\UBS: ./gantt < anr.gant\\ + \t WARNING: ubs :D511 probleme sur l'an 1 (in table=7.0, in gantt=6.0 \\ + \t ERROR: ubs :D840 probleme sur l'an 1 (in table=0.5, in gantt=0.0} + }} + {10}{4} + +% \begin {description} +% \item [Equipment] +% In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA +% development boards. The cost for these FPGA boards is estimated to 3\% of the total +% ANR funding. +% \item [Personnel costs] +% The faculty members involved in the project are associate professors (Philippe COUSSY, +% Cyrille CHAVET) or research engineers (Dominique HELLER). All non-permanent personnel +% costs are estimated in \hommemois for senior researchers (post-doc or research +% engineers). +% \parlf +% The table below summarizes the man power in \hommemois by tasks for both permanent and +% non-permanent personnels. The detail by deliverables is given in +% annexe~\ref{table-livrables-usb} (page \pageref{table-livrables-usb}). +% The non-permanent personnels costs represent 50\% of the personnel costs. +% The requested funding for non permanent personnels is about 83\% of the total ANR +% requested funding. +% \begin{center}\input{table_ubs_short.tex}\end{center} +% \item [Subcontracting] +% No subcontracting costs. +% \item [Travel] +% The travel costs are associated to management and meeting as well as participation to +% conferences. The travel costs are estimated to 10\% of the total requested ANR funding. +% \item [Expenses for inward billing] +% The costs justified by internal invoicing procedures are evaluated to 4\% of the total +% requested ANR funding. +% \end {description} + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsection{Partner 4: \liplong} +\ressourcesForAcademic + {inria_compsys}{} + {{\lip}{46}{22}{Christophe Alias and Paul Feautrier}{100}{ + \\We are looking for a candidate with both theoretical and + practical skills, that will be able to get a sufficient + understanding of the polyhedral techniques. + \mustbecompleted{\\LIP: DANS FIG.8 vous avez 28 hm. 46-28=18 --> 40\%\\ + IL FAUT ETRE <= 50\%, le max de non permanent est 23.} + \mustbecompleted{\\LIP: Vous n'etes dans aucuns projets annexe 7.3 ?} + \mustbecompleted{\\LIP: ./gantt < anr.gant\\ + \t WARNING: lip :D432 probleme sur l'an 2 (in table=7.0, in gantt=6.0 \\ + \t WARNING: lip :D432 probleme sur l'an 3 (in table=13.0, in gantt=12.0\\ + \t ERROR: lip :D730 probleme sur l'an 3 (in table=0.0, in gantt=3.0} + }} + {\mustbecompleted{(LIP: ca fait beaucoup) }20}{4} +% +% \begin{description} +% \item [Equipment] +% No specific equipment acquisition. The costs for depreciation of +% workstations is evaluated to 4\% of the total requested ANR funding. +% \item [Personnel costs] The faculty members involved in the project +% are Christophe Alias (INRIA researcher) and Paul Feautrier (emeritus +% professor at ENS-Lyon). The non-permanent personel required is a +% post-doc that will work on FIFO construction, then on extensions of +% process construction and memory optimization to non-polyhedral +% loops. We are looking for a candidate with both theoretical and +% practical skills, that will be able to get a sufficient +% understanding of the polyhedral techniques to produce a working +% implementation. +% \parlf +% The table below summarizes the \hommemois by tasks for both permanent +% and non-permanent personnels. +% Annexe~\ref{table-livrables-lip} (page \pageref{table-livrables-lip}) +% details this table at the deliverable level. +% The effort of permanent personnels represents 61\% of +% the total effort. The non-permanent personnels costs represents +% 52\% of the personal costs. The requested funding for non permanent +% personnels is 100\% of the total ANR requested +% funding. +% \begin{center}\input{table_inria_compsys_short.tex}\end{center} +% \item [Subcontracting] +% No subcontracting costs. +% \item [Travel] +% The travel costs are associated to project meeting as well as +% participation to conferences. The travel costs are estimated to 20\% +% of the total requested ANR funding. +% \item [Expenses for inward billing] +% The costs justified by internal invoicing procedures are evaluated +% to 4\% of the total requested ANR funding. +% \end{description} + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsection{Partner 5: \tima} +\ressourcesForAcademic + {tima}{} + {{\tima}{48}{24}{Fr\'ed\'eric P\'etrot, Olivier Muller and Adrien Prost-Boucle}{86}{ + \\One 100\% funded phd student will be hired in September 2011, we are looking + for a profile with strong informatic skills and good knowledge in computer architecture. + A post-doc researcher will be hired at the end of 2012 for one year, the + required profile will be more oriented on computer architecture and + advanced digital design. + \mustbecompleted{\\TIMA: \begin{itemize} + \item chiffre delirant: dans figure 8 vous avez 52 hm ??? vous devez avoir 24. + \item vous dites ci dessus que vous embauchez pour 50 hm, hors l'effort + des non permanent est 24 ??? + \end{itemize}\mbox{}} + }} + {10}{4} +% +% \begin{description} +% \item [Equipment] +% No specific equipment acquisition. +% \item [Personnel costs] +% The permanent personnels involved in the project are professor and associate professor +% (Fr\'ed\'eric P\'etrot and Olivier Muller). +% The non permanent personnels are Phd students and post-doc researchers. +% Related costs are estimated in \hommemois. +% One phd student (Adrien Prost-Boucle), funded by the French ministry of research, will +% be working on the project. +% One 100\% funded phd student will be hired in September 2011. +% A post-doc researcher will be hired at the end of 2012 for one year. +% The PhD student will mainly work on the evolution of UGH HLS tool. Thus, we are looking +% for a profile with strong informatic skills and good knowledge in computer architecture. +% The post-doc will mainly work on HPC. The required profile +% will be more oriented on computer architecture and advanced digital design. +% \parlf +% The table below summarizes the man power in \hommemois by tasks for both permanent and +% non-permanent personnels. The detail by deliverables is given in +% annexe~\ref{table-livrables-tima} (page \pageref{table-livrables-tima}). +% The effort of permanent personnels represents 50\% of the total effort. +% The requested funding for non permanent personnels is 86\% of the total ANR requested +% funding. +% \begin{center}\input{table_tima_short.tex}\end{center} +% \item [Subcontracting] +% No subcontracting costs. +% \item [Travel] +% The travel costs are associated to project meeting as well as participation to +% conferences. The travel costs are estimated to 10\% of the total requested ANR funding. +% \item [Expenses for inward billing] +% The costs justified by internal invoicing procedures are evaluated to 4\% of the total +% requested ANR funding. +% \end{description} + +%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\subsection{Partner 6: \inria} +\ressourcesForAcademic + {inria_cairn}{} + {{\inria}{42}{20}{ François Charot and Steven Derrien}{100}{ + We are looking for a profile with strong skills in SW development and good + knowledge in computer architecture. + \mustbecompleted{\\IRISA figure 8 vous avez 18 hm vous devez avoir 22.} + \mustbecompleted{\\IRISA: Vous n'etes dans aucuns projets annexe 7.3 ?} + \mustbecompleted{\\IRISA: ./gantt < anr.gant\\ + \t ERROR: inria :D420 probleme sur l'an 3 (in table=0.0, in gantt=3.0} + }} + {7.5}{4} +% +% \begin{description} +% \item [Equipment] +% No specific equipment acquisition. +% \item [Personnel costs] The faculty members involved in the project +% are François Charot (INRIA researcher) and Steven Derrien (associate +% professor). +% The non-permanent personal required is a PhD +% student that will mainly work on ASIP generation. We are looking for +% a profile with strong informatic skills and good knowledge in +% computer architecture. +% \parlf +% The table below summarizes the manpower in \hommemois by tasks for both permanent and +% non-permanent personnels. The detail by deliverables is given in +% annexe~\ref{table-livrables-inria} (page \pageref{table-livrables-inria}). +% The non-permanent personnels costs represent {48\%} of the personnal +% costs. The requested funding for non permanent personnels is 100\% of +% the total ANR requested funding. +% \begin{center}\input{table_inria_cairn_short.tex}\end{center} +% \item [Subcontracting] +% No subcontracting costs. +% \item [Travel] +% The travel costs are associated to project meeting as well as participation to +% conferences. The travel costs are estimated to {7,5\%} of the total +% requested ANR funding. +% \item [Expenses for inward billing] +% The costs justified by internal invoicing procedures are evaluated to 4\% of the total +% requested ANR funding. +% \end{description} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsection{Partner 7: \bull} -\begin{description} -\item[Equipment] - Acquisition of a FPGA development board will represent the main equipment cost for +\ressources + {bull} + { Acquisition of a FPGA development board will represent the main equipment cost for Bull in COACH. It is estimated at about 5\% (tbc) of the total funding. -\item[Personnel costs] - A permanent engineer will be assigned full time to the project for a duration of 36 - months as shown in the table below that summarizes the man power in \hommemois. - The detail by deliverables is given in + \mustbecompleted{INCOHERENCE avec SITE ANR} + } + { + The man power detail in \hommemois by deliverables is given in annexe~\ref{table-livrables-bull} (page \pageref{table-livrables-bull}). - \begin{center}\input{table_bull_short.tex}\end{center} -\item[Subcontracting] - No subcontracting costs. -\item[Travel] - Application of a standard 10\% of the total funding to travel costs. -\item[Expenses for inward billing] - Costs justified by inward billing are estimated to about 5\% of the total funding. -\item[Other working costs] none -\end{description} + and a summary by task in the following table. + \bull employees involved in the project are a manager for 9 \hommemois + and an engineer for 27 \hommemois.} + {10}{5} + +% \begin{description} +% \item[Equipment] +% Acquisition of a FPGA development board will represent the main equipment cost for +% Bull in COACH. It is estimated at about 5\% (tbc) of the total funding. +% \item[Personnel costs] +% A permanent engineer will be assigned full time to the project for a duration of 36 +% months as shown in the table below that summarizes the man power in \hommemois. +% The detail by deliverables is given in +% annexe~\ref{table-livrables-bull} (page \pageref{table-livrables-bull}). +% \begin{center}\input{table_bull_short.tex}\end{center} +% \item[Subcontracting] +% No subcontracting costs. +% \item[Travel] +% Application of a standard 10\% of the total funding to travel costs. +% \item[Expenses for inward billing] +% Costs justified by inward billing are estimated to about 5\% of the total funding. +% \item[Other working costs] none +% \end{description} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% \subsection{Partner 8: \thales} - -\begin{description} -\item[Equipment] - In order to validate the design flow,TRT will buy FPGA developpement boards. The cost - for these FPGA boards is estimated to 10 k\euro (6\% of the total ANR funding). -\item[Personnel costs] - The effort to adapt SPEAR DE to generate the input files to COACH framework is - estimated to 13 \hommemois. - The effort to describe and develop the application is estimated to 14 \hommemois. - Finally we need one man*month for the participation to the global specification in task 2. - This is summarized in the table below and detailed by deliverables in +\ressources + {thales} + { In order to validate the design flow,TRT will buy FPGA developpement boards. The cost + for these FPGA boards is estimated to 11 k\euro (6\% of the total ANR funding). + \mustbecompleted{INCOHERENCE avec SITE ANR} + } + { The man power detail in \hommemois by deliverables is given in annexe~\ref{table-livrables-thales} (page \pageref{table-livrables-thales}). - \begin{center}\input{table_thales_short.tex}\end{center} -\item[Subcontracting] - No subcontracting costs. -\item[Travel] - The travel costs are associated to meeting, plenaries as well as participation to - conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to - 5\% of the total requested ANR funding. -\item[Expenses for inward billing] none -\item[Other working costs] none -\end{description} + and a summary by task in the following table. + \thales employees involved in the project are a manager for 18 \hommemois + and an engineer for 18 \hommemois.} + {5}{} + +% \begin{description} +% \item[Equipment] +% In order to validate the design flow,TRT will buy FPGA developpement boards. The cost +% for these FPGA boards is estimated to 10 k\euro (6\% of the total ANR funding). +% \item[Personnel costs] +% The effort to adapt SPEAR DE to generate the input files to COACH framework is +% estimated to 13 \hommemois. +% The effort to describe and develop the application is estimated to 14 \hommemois. +% Finally we need one man*month for the participation to the global specification in task 2. +% This is summarized in the table below and detailed by deliverables in +% annexe~\ref{table-livrables-thales} (page \pageref{table-livrables-thales}). +% \begin{center}\input{table_thales_short.tex}\end{center} +% \item[Subcontracting] +% No subcontracting costs. +% \item[Travel] +% The travel costs are associated to meeting, plenaries as well as participation to +% conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to +% 5\% of the total requested ANR funding. +% \item[Expenses for inward billing] none +% \item[Other working costs] none +% \end{description} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Index: /anr/task-backend.tex =================================================================== --- /anr/task-backend.tex (revision 355) +++ /anr/task-backend.tex (revision 356) @@ -22,5 +22,5 @@ cover respectively data and control dominated designs. \end{objectif} - +% \begin{workpackage} \subtask{Integration of UGH \& GAUT HLS tools to COACH} @@ -89,30 +89,2 @@ \end{livrable} \end{workpackage} -%% -%% \subtask{Making HAS back-end to read \xcoach format} -%% The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework. -%% by implementing the mechanism to read \xcoach format. -%% \begin{livrable} -%% \itemL{6}{12}{x}{\Stima}{UGH integration}{12:0:0} -%% Release of the UGH software that reads \xcoach format. -%% \itemL{6}{12}{x}{\Subs}{GAUT release reading \xcoach}{6:0:0} -%% Release of the GAUT software that is able to read \xcoach format. -%% \end{livrable} -%% % -%% \subtask{Making HAS back-end to write \xcoachplus format} -%% The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework. -%% by implementing the mechanism to write \xcoachplus format. -%% \begin{livrable} -%% \itemL{12}{18}{x}{\Supmc}{UGH integration}{0:2:4.0} -%% Release of the UGH software that writes \xcoachplus format. -%% \itemL{12}{18}{x}{\Subs}{GAUT release writing \xcoachplus}{0:6:0} -%% Release of the GAUT software that is able to read \xcoach format and to write \xcoachplus format. -%% \end{livrable} -%% % -%% \subtask{Adapting HAS tools to the COACH communication schemes} -%% \begin{livrable} -%% \itemL{12}{18}{x}{\Supmc}{UGH update for COACH communications}{0:2:4.0} -%% Release of the UGH software that interprets the API of task communication. -%% \itemL{12}{18}{x}{\Subs}{GAUT update for COACH communications}{0:2:4.0} -%% Release of the GAUT software that interprets the API of task communication. -%% \end{livrable} Index: /anr/task-demonstrator.tex =================================================================== --- /anr/task-demonstrator.tex (revision 355) +++ /anr/task-demonstrator.tex (revision 356) @@ -55,7 +55,11 @@ \setMacroInAuxFile{trtAppSpecification} This deliverable is a document that specifies the application. - \itemL{6}{12}{x}{\Sthales}{\thales demonstrator}{4:0:0} - This deliverable is the code of the application specified in the former - deliverable (\trtAppSpecification). + \itemV{6}{12}{x}{\Sthales}{\thales demonstrator} + The deliverable is the specification of the demonstrator in COACH input format + defined in the {\NOVERSuseModelSpecification} deliverable (milestone M2). + \itemL{12}{27}{x}{\Sthales}{\thales demonstrator}{3:2:2} + Validation of demonstrator for M4 milestone. + The deliverable is the specification of the demonstrator in COACH + milestone M4. \end{livrable} % @@ -67,5 +71,5 @@ be able to partition the application on the architecture. \begin{livrable} - \itemL{6}{18}{x}{\Sthales}{SPEAR-DE adaptation}{6:7:0} + \itemL{6}{27}{x}{\Sthales}{SPEAR-DE adaptation}{6:7:3} \setMacroInAuxFile{trtSpearde} Adaptation of SPEAR-DE for COACH framework. @@ -73,5 +77,5 @@ \end{livrable} % - \subtask{\mds use case} +\subtask{\mds use case} The goal of the \mds demonstrator will be to experiment and validate the good integration of the COACH tools into an industrial SoC design flow for critical systems. This demonstrator will be based on @@ -82,10 +86,11 @@ generic enough or at least customizable in order to be at the basis of the further deployement into actual design flows. The objectives of this demonstrator are the following: -\begin{itemize} - \item Validate the IP-XACT packaging of the generated SoC - \item Experiment the integration of the generated SoC into the top level (TLM or RTL) of a bigger system - \item Bring a focus on flow capabilities for requirements traceability from system properties, down to sub-systems implementation -\end{itemize} - + \begin{itemize} + \item Validate the IP-XACT packaging of the generated SoC. + \item Experiment the integration of the generated SoC into the top level + (TLM or RTL) of a bigger system. + \item Bring a focus on flow capabilities for requirements traceability + from system properties, down to sub-systems implementation. + \end{itemize} \begin{livrable} \itemV{0}{12}{d}{\Smds}{Use case} @@ -97,5 +102,5 @@ This deliverable is the final demonstrator specified in (\mdsAppSpecification). \end{livrable} - +% \subtask{Evaluation report} In this sub-task, \mds, \thales and \bull will evaluate the COACH platform. @@ -113,6 +118,6 @@ using the COACH milestone of T0+18. \itemL{27}{36}{d+x}{\Smds}{Evaluation}{0:3:3} - \OtherPartner{18}{36}{Sbull}{0:4:5} - \OtherPartner{18}{36}{Sthales}{0:4:5} + \OtherPartner{18}{36}{Sbull}{0:4:4.5} + \OtherPartner{18}{36}{Sthales}{0:4:4.5} This deliverable is a document that validates and evaluates the COACH final release for the demonstrators. Index: /anr/task-dissemination.tex =================================================================== --- /anr/task-dissemination.tex (revision 355) +++ /anr/task-dissemination.tex (revision 356) @@ -64,32 +64,32 @@ % \subtask{Reference user manuals} - \begin{livrable} - \itemL{21}{27}{d}{\Stima}{CSG User manual}{0:.5:1} - This user manual shows how to generate a complete HW/SW system by using the CSG tool. - \itemL{21}{27}{d}{\Slip}{HAS front-end user manual}{0:.5:1} - This user manual shows how to apply loop transformations to a task. - \itemL{21}{27}{d}{\Sinria}{ASIP user manual}{0:1:1} - This user manual shows how to customize a processor to obtain an ASIP. - \itemL{21}{27}{d}{\Subs}{HLS user manual}{0:.5:1.5} - This user manual shows how a task can be synthesized by using UGH and GAUT tools. - \OtherPartner{12}{36}{\Subs}{0:2:2} - \itemL{21}{27}{d}{\Smds}{Magillem framework user manual}{0:1:1} - This user manual describes how to use COACH within the IP-XACT based Magillem tool suite. - \end{livrable} + \begin{livrable} + \itemL{21}{27}{d}{\Stima}{CSG User manual}{0:.5:1} + This user manual shows how to generate a complete HW/SW system by using the CSG tool. + \itemL{21}{27}{d}{\Slip}{HAS front-end user manual}{0:.5:1} + This user manual shows how to apply loop transformations to a task. + \itemL{21}{27}{d}{\Sinria}{ASIP user manual}{0:1:1} + This user manual shows how to customize a processor to obtain an ASIP. + \itemL{21}{27}{d}{\Subs}{HLS user manual}{0:.5:1.5} + This user manual shows how a task can be synthesized by using UGH and GAUT tools. + \OtherPartner{12}{36}{\Subs}{0:2:2} + \itemL{21}{27}{d}{\Smds}{Magillem framework \ganttlf user manual}{0:1:1} + This user manual describes how to use COACH within the IP-XACT based Magillem tool suite. + \end{livrable} % \subtask{Publications and Communications} - \begin{livrable} - \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:2:3} - \OtherPartner{12}{36}{\Sinria} {0:1:1} - \OtherPartner{12}{36}{\Slip} {0:1:1} - \OtherPartner{12}{36}{\Stima} {0:1:1} - \OtherPartner{12}{36}{\Subs} {.5:1:1} - \OtherPartner{12}{36}{\Supmc} {0:1:1} - \OtherPartner{12}{36}{\Sbull} {0:.5:.5} - \OtherPartner{12}{36}{\Sthales}{0:1:1} - This deliverable groups the effort to make COACH better known. It consists - mainly in writing/submitting papers and in presenting COACH in to trade - show and workshop and organizing a final white paper. - This white paper will facilitates the dissemination towards industrial prospects. - \end{livrable} + \begin{livrable} + \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:2:3} + \OtherPartner{12}{36}{\Sinria} {0:1:1} + \OtherPartner{12}{36}{\Slip} {0:1:1} + \OtherPartner{12}{36}{\Stima} {0:1:1} + \OtherPartner{12}{36}{\Subs} {.5:1:1} + \OtherPartner{12}{36}{\Supmc} {0:1:1} + \OtherPartner{12}{36}{\Sbull} {0:.5:.5} + \OtherPartner{12}{36}{\Sthales}{0:1:1} + This deliverable groups the effort to make COACH better known. It consists + mainly in writing/submitting papers and in presenting COACH in to trade + show and workshop and organizing a final white paper. + This white paper will facilitates the dissemination towards industrial prospects. + \end{livrable} \end{workpackage} Index: /anr/task-frontend.tex =================================================================== --- /anr/task-frontend.tex (revision 355) +++ /anr/task-frontend.tex (revision 356) @@ -12,5 +12,5 @@ (C/C++) with as few constraints as possible, into a form suitable for the HLS tools (i.e. HAS back-end tools of the COACH project). If the -target is an ASIP, the frontend has to extract +target is an ASIP, the front-end has to extract patterns from the source code and convert them into the definition of an extensible processor. If the target is a process network, the @@ -36,5 +36,5 @@ instructions. \end{livrable} - +% \subtask{Micro-architectural template models for ASIP} In this sub-task, we provide micro-architectural template models for the two target @@ -57,19 +57,19 @@ the different approaches} \end{livrable} - +% \subtask{Automatic parallelization and memory optimization} -This sub-task aims at providing a source-level optimizer in front the -HLS back-end tools. The optimizations are threefold: -\begin{itemize} -\item Extraction of parallelism in polyhedral loops and conversion - into a process network. -\item Minimization of intra-process local memory -\item Construction of inter-process FIFOs -\end{itemize} -We will design these methods by using polyhedral techniques, as we did -in the past for pure HPC optimizations. The program model is typically -regular programs where loop bounds, conditions and array indices are -affine functions. In a second part, we will extend the program model -by using conservative approximations. + This sub-task aims at providing a source-level optimizer in front the + HLS back-end tools. The optimizations are threefold: + \begin{itemize} + \item Extraction of parallelism in polyhedral loops and conversion + into a process network. + \item Minimization of intra-process local memory + \item Construction of inter-process FIFOs + \end{itemize} + We will design these methods by using polyhedral techniques, as we did + in the past for pure HPC optimizations. The program model is typically + regular programs where loop bounds, conditions and array indices are + affine functions. In a second part, we will extend the program model + by using conservative approximations. \begin{livrable} \itemV{0}{6}{d}{\Slip}{Method, Preliminary Definition} @@ -99,5 +99,5 @@ demonstrator \STs. \end{livrable} - +% \end{workpackage} Index: /anr/task-hpc.tex =================================================================== --- /anr/task-hpc.tex (revision 355) +++ /anr/task-hpc.tex (revision 356) @@ -6,5 +6,4 @@ \let\UPMC\enable \let\TIMA\enable -\let\THALES\enable \let\XILINX\enable \end{taskinfo} @@ -43,5 +42,5 @@ \itemL{21}{27}{x}{\Stima}{HPC API for Linux}{0:2:1.5} \OtherPartner{21}{27}{\Supmc}{0:1.5:1.0} - \OtherPartner{21}{27}{\Sbull}{0:0.0:0.5} + \OtherPartner{21}{27}{\Sbull}{0:0.5:0.5} \setMacroInAuxFile{hpcForLinux} This deliverable groups all the software components to implement the @@ -64,5 +63,5 @@ % It also includes appropriate SoC-FPGA OS drivers and a modification of the profiling library. \begin{livrable} - \itemL{18}{36}{x}{\Stima}{Support for HPC environment set up}{0:3:3} + \itemL{18}{36}{x}{\Stima}{Support for HPC \ganttlf environment set up}{0:3:3} Modification of the CSG software to set-up the HPC environment. The objective is to run easily HPC application and the main features are: @@ -71,28 +70,4 @@ part of the HPC application. \end{livrable} -% \itemL{18}{36}{x}{\Stima}{CSG module for \ganttlf dynamic reconfiguration}{0:4:12} -% This livrable is a CSG module allowing to partition the task graph along -% the dynamic partial reconfiguration regions. The resulting task-region assignement -% is directly used for generation of bitstreams. The module also produces reconfiguration -% management software to be run on the SoC-FPGA. -% \itemL{18}{30}{x}{\Stima}{Dynamic reconfiguration \ganttlf for DNA drivers}{0:3:3} -% \setMacroInAuxFile{hpcDynconfDriver} -% The drivers required by the DNA OS in order to manage dynamic partial -% reconfiguration inside the SoC-FPGA. -% \itemL{30}{36}{x}{\Supmc}{Dynamic reconfiguration \ganttlf for MUTEKH drivers}{0:0:1} -% Port of the {\hpcDynconfDriver} drivers on the MUTEKH OS. -% \itemL{24}{36}{x}{\Stima}{Profiler for \ganttlf dynamic reconfiguration}{0:0:6} -% Extension of the HPC partionning helper in order to integrate dynamic partial -% reconfiguration dedicated features (reconfiguration time of regions, variable -% number of coprocessors). -% \itemL{24}{36}{d}{\Sxilinx}{Optimisation for \xilinx \ganttlf dynamic reconfiguration}{0:0:2} -% \xilinx will work with \tima in order to better take into account during -% partitioning decisions specific constraints due to partial reconfiguration process. -% The deliverable is a document describing the \xilinx specific constraints. -% \end{livrable} -% %\item This \ST is the delivery of 2 PCI/X \mustbecompleted{FIXME: Stratix4} FPGA board -% % with its PCI/X IP. These boards are dedicated to the COACH HPC development. -% % They are based on \mustbecompleted{FIXME:stratix4} FPGA device of 400,000 LUT. -% % \begin{livrable} -% % \itemL{0}{6}{m}{\Saltera}{HPC development boards}{0:0:0} Two PCI/X FPGA boards. +% \end{workpackage}